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ISL28230CRZ Folha de dados(PDF) 11 Page - Intersil Corporation

Nome de Peças ISL28230CRZ
Descrição Electrónicos  Single, Dual, and Quad Micropower, Low Drift, RRIO Operational Amplifiers
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Fabricante Electrônico  INTERSIL [Intersil Corporation]
Página de início  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISL28230CRZ Folha de dados(HTML) 11 Page - Intersil Corporation

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ISL28130, ISL28230, ISL28430
11
FN7623.1
December 16, 2010
Applications Information
Functional Description
The ISL28130, ISL28230 and ISL28430 are low offset low drift
operational amplifiers with a very high open loop gain (150dB)
and rail-to-rail input/output. The ISL28130, ISL28230 and
ISL28430 operate on a single supply range of 1.65V to 5.5V or
dual supply range of ±0.825V to ±2.75V while consuming only
20µA of supply current per channel. The ISL28130, ISL28230
and ISL28430 has a 400kHz gain-bandwidth.
The high open loop gain, low offset voltage, high bandwidth and
low 1/f noise make the ISL28130, ISL28230 and ISL28430
ideal for precision applications.
Rail-to-rail Input and Output (RRIO)
The RRIO CMOS amplifier uses parallel input PMOS and NMOS
that enable the inputs to swing 100mV beyond either supply rail.
The inverting and non-inverting inputs do not have back-to-back
input clamp diodes and are capable of maintaining high input
impedance at high differential input voltages. This is effective in
eliminating output distortion caused by high slew-rate input
signals.
The output stage uses common source connected PMOS and
NMOS devices to achieve rail-to-rail output drive capability with
15mA current limit and the capability to swing to within 50mV of
either rail while driving a 10k
Ω load.
IN+ and IN- Protection
All input terminals have internal ESD protection diodes to both
positive and negative supply rails, limiting the input voltage to
within one diode beyond the supply rails. For applications where
either input is expected to exceed the rails by 0.5V, an external
series resistor must be used to ensure the input currents never
exceed 20mA (see Figure 23).
Layout Guidelines for High Impedance Inputs
To achieve the maximum performance of the high input
impedance and low offset voltage of the ISL28130, ISL28230 and
ISL28430 amplifiers, care should be taken in the circuit board
layout. The PC board surface must remain clean and free of
moisture to avoid leakage currents between adjacent traces.
Surface coating of the circuit board will reduce surface moisture
and provide a humidity barrier, reducing parasitic resistance on the
board.
High Gain, Precision DC-Coupled Amplifier
The circuit in Figure 24 implements a single-stage DC-coupled
amplifier with an input DC sensitivity of under 100nV that is only
possible using a low VOS amplifier with high open loop gain. High
gain DC amplifiers operating from low voltage supplies are not
practical using typical low offset precision op amps. For example,
a typical precision amplifier in a gain of 10kV/V with a ±100µV
VOS and offset drift 0.5µV/°C of a low offset op amp would
produce a DC error of >1V with an additional 5mV/°C of
temperature dependent error making it difficult to resolve DC
input voltage changes in the mV range.
The ±40µV max VOS and 150nV/°C of temperature drift of the
ISL28130, ISL28230, ISL28430 produces a temperature stable
maximum DC output error of only ±400mV with a maximum
output temperature drift of 1.5mV/°C. The additional benefit of a
very low 1/f noise corner frequency and some feedback filtering
enables DC voltages and voltage fluctuations well below 10µV to
be easily detected with a simple single stage amplifier.
FIGURE 23. INPUT CURRENT LIMITING
-
+
RIN
RL
VIN
VOUT
FIGURE 24. HIGH GAIN, PRECISION DC-COUPLED AMPLIFIER
-
+
100
Ω
RL
VIN
VOUT
1M
Ω
1M
Ω,
100
Ω
-2.5V
+2.5V
ACL = 10kV/V
CF
0.018µF


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