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ISL12026AIVZ Folha de dados(PDF) 2 Page - Intersil Corporation

Nome de Peças ISL12026AIVZ
Descrição Electrónicos  Real Time Clock/Calendar with I2C Bus??and EEPROM
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Fabricante Electrônico  INTERSIL [Intersil Corporation]
Página de início  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISL12026AIVZ Folha de dados(HTML) 2 Page - Intersil Corporation

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FN8231.9
November 30, 2010
Block Diagram
Ordering Information
PART NUMBER
(Notes 1, 2, 3)
PART
MARKING
VBAT TRIP POINT
(V)
BSW BIT DEFAULT
SETTING
TEMP RANGE
(°C)
PACKAGE
(Pb-Free)
PKG.
DWG. #
ISL12026IBZ
12026 IBZ
VDD < VBAT
BSW = 1
-40 to +85
8 Ld SOIC
M8.15
ISL12026IVZ
2026 IVZ
VDD < VBAT
BSW = 1
-40 to +85
8 Ld TSSOP
M8.173
ISL12026AIBZ
12026A IBZ
2.2
BSW = 0
-40 to +85
8 Ld SOIC
M8.15
ISL12026AIVZ
2026A IVZ
2.2
BSW = 0
-40 to +85
8 Ld TSSOP
M8.173
NOTES:
1. Add “-T*” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-
free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for ISL12026, ISL12026A. For more information on MSL please see
techbrief TB363.
X1
X2
OSCILLATOR
FREQUENCY
TIMER
LOGIC
DIVIDER
CALENDAR
8
CONTROL/
REGISTERS
1Hz
TIME
KEEPING
REGISTERS
ALARM REGS
COMPARE
CONTROL
DECODE
LOGIC
ALARM
(EEPROM)
(EEPROM)
SCL
SDA
SERIAL
INTERFACE
DECODER
4k
EEPROM
ARRAY
REGISTERS
STATUS
(SRAM)
SELECT
IRQ/FOUT
VDD
VBAT
32.768kHz
(SRAM)
BATTERY
CIRCUITRY
SWITCH
OSC
COMPENSATION
Pin Descriptions
PIN NUMBER
SYMBOL
DESCRIPTION
SOIC
TSSOP
1
3
X1
The X1 pin is the input of an inverting amplifier and is intended to be connected to one pin of an external
32.768kHz quartz crystal. X1 can also be driven directly from a 32.768kHz source (see “Application Section”
on page 19.)
2
4
X2
The X2 pin is the output of an inverting amplifier and is intended to be connected to one pin of an external
32.768kHz quartz crystal (see “Application Section” on page 19.)
35
IRQ/FOUT
Interrupt Output/Frequency Output is a multi-functional pin that can be used as interrupt or frequency
output pin. The function is set via the control register. This output is an open drain configuration.
4
6
GND
Ground.
5
7
SDA
Serial Data (SDA) is a bidirectional pin used to transfer serial data into and out of the device. It has an open
drain output and may be wire OR’ed with other open drain or open collector outputs.
6
8
SCL
The Serial Clock (SCL) input is used to clock all serial data into and out of the device. The input buffer on
this pin is always active (not gated).
71
VBAT
This input provides a backup supply voltage to the device. VBAT supplies power to the device in the event
that the VDD supply fails. This pin should be tied to ground if not used.
82
VDD
Power Supply.
ISL12026, ISL12026A


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