No. 5692-10/32

LC78626E

Continued from preceding page.

Pin

Pin

I/O

Description

No.

Name

General I/O pin 3. This controls the commands from the microcontroller. This pin is shared exclusively with

34

CONT3/SBCK

I/O

the subcode read clock input (SBCK). When not used, either set this as an input port and connect to 0 V, or set

this as an output port and leave it open.

General I/O pin 4. This controls the commands from the microcontroller. This pin is shared exclusively with

35

CONT4/SFSY

I/O

the subcode frame sync signal output (SFSY). When not used, either set this as an input port and connect to 0

V, or set this as an output port and leave it open.

General I/O pin 5. This controls the commands from the microcontroller. This pin is shared, exclusively, with

36

CONT5/PW

I/O

the subcode P, Q, R, S, T, U, V, W output (PW). When not used, either set this as an input port and connect to

0 V, or set this as an output port and leave it open.

37

SBSY

O

Subcode block sync signal output.

38

TEST3

I

Test input. Equipped with an internal pull-down resistor. Must be connected to 0 V.

39

DOUT

O

Digital output. EIAJ format.

40

TEST4

I

Test input. Equipped with an internal pull-down resistor. Must be connected to 0 V.

41

16M

O

16.9344 MHz output.

42

4.2M

O

4.2336 MHz output.

43

EFLG

O

C1, C2, one error, two error error correction monitor output

44

FSX

O

7.35 kHz sync signal output (frequency divided from the crystal oscillator).

45

EMPH

O

Deemphasis monitor output. When high level, a deemphasis disk is being played back.

46

C2F

O

C2 flag output.

47

TOUT

O

Test output. Under normal operation, this should be left open.

48

MR1

I

DRAM switch: high : 1M, low : 4M

49

TESE

I

Test input. Must be connected to 0V.

50

TESD

I

Test input. Must be connected to 0V.

51

MUTESL

O

L channel mute output.

52

P

L channel power supply.

53

LCHO

AO

L channel output.

54

P

For the one-bit D/A

L/R channel ground. Must be connected to 0 V.

55

RCHO

AO

converter

R channel output.

56

P

R channel power supply.

57

MUTER

O

R channel mute output.

58

XVDD

P

Crystal oscillator power supply.

59

XOUT

O

16.9344 MHz crystal oscillator connection.

60

XIN

I

61

XVSS

P

Crystal oscillator ground. Must be connected to 0 V.

62

RWC

I

Read/write control input. Schmidt input.

63

COIN

I

Microcontroller command input.

64

CQCK

I

Input pin for the command input latch clock and the subcode readout clock. Schmitt input.

65

SQOUT

O

Subcode Q output.

66

WRQ

O

Subcode Q output standby output.

67

FMT

I

Operating mode switch: high: shock proof, low: through.

68

EMPP

O

DRAM empty (an RZP pulse is output when the DRAM is empty).

69

RES

I

External reset input: low reset (all internal blocks are reinitialized).

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