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LZ93N19 Folha de dados(PDF) 5 Page - Sharp Corporation |
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LZ93N19 Folha de dados(HTML) 5 Page - Sharp Corporation |
5 / 5 page SYMBOL PIN NAME FUNCTION An input pin for reference clock, to DOUT (pin 3) of timing LSI ) or DO (pin 3) of timing LSI; following frequencies ap- 27 CLKI Main clock pear on this pin; At mode : 9.534964 MHz when CKMD = L level 12.713285 MHz when CKMD = H level At PAL mode : 9.656250 MHz when CKMD = L level 12.875 MHz when CKMD = H level 28 Vcc — — Power supply Supply +5 V Phase comparator output for input signals RPI (pin Phase comparator 32) and (pin 30). When is advanced, output 29 TO — is Low level. When CPI is delayed, output is High output level, When phases are equal, the terminal imped- ance is High. An input pin for comparison horizontal signal to the 30 – Horizontal comparison phase comparator. Connect to SCHD (pin 33) when input comparator is used. Set to L level when comparator is not used. 31 HD o Horizontal drive pulse The pulse occurs at the start of lines. Connect to timing LSI. An input pin for the reference horizontal signal to 32 RPI Horizontal reference the phase comparator. Connect to HD (pin 31) when input comparator is used, Set to L level when comparator is not used. A horizontal synchronization pulse obtained by di- viding 4FSC (pin 43). At NTSC mode : dividing into 1 /91 O 4FSC. 33 SCHD o Subcarrier HD At PAL mode : dividing into 135 4FSC ordi- narily and dividing into 1/1 137 4FSC during one horizontal pe- riod within the V blanking, The pulse occurs at the start of every field. Con- 34 VD 0 V drive pulse nect to VDI (pin 2) of timing ) or VDI (Pin of timing The pulse is used for detecting field. At NTSC mode : 1st field; LOW 35 o Filed index 2nd field; HIGH At PAL mode : 1st and 3rd field; LOW 2nd and 4th field; HIGH 36 CPBL Blanking clamp pulse When the input is High, BCPI (pin 37) and BCP2 (pin 36) are Low. |
Nº de peça semelhante - LZ93N19 |
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Descrição semelhante - LZ93N19 |
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