LB11870

No.7256-11/14

Continued from preceding page.

Pin No.

Symbol

Pin Description

Equivalent Circuit

36

VREG

Stabilized power supply output (5V output).

Insert a capacitor of about 0.1

μF between this

pin and ground for stabilization.

40

VCC1

Power supply.

Insert a capacitor of at least 10µF between this

pin and ground to prevent noise from entering

the IC.

2, 4, 5

7, 18

20, 30

31, 41

42, 43

45, 47

48

NC

Since these pins are not connected to the IC

internally, they can be used for wiring

connections.

FRAME

Connect this pin to ground.

Overview of the LB11870

1. Speed Control Circuit

This IC adopts a PLL speed control technique and provides stable motor operation with high precision and low jitter.

This PLL circuit compares the phase error at the edges of the CLK signal (falling edges) and FG signal (falling edges

on the FGIN+ and FGS signals), and the IC uses the detected error to control motor speed.

During this control operation, the FG servo frequency will be the same as the CLK frequency.

fFG (servo) = fCLK

2. Output Drive Circuit

To minimize power loss in the output circuits, this IC adopts a direct PWM drive technique. The output transistors

are always saturated when on, and the IC adjusts the motor drive output by changing the output on duty. The low side

output transistor is used for the output PWM switching.

Both the high and low side output diodes are integrated in the IC. However, if reverse torque control mode is selected

for use during deceleration, or if a large output current is used and problems occur (such as incorrect operation or

waveform disruption due to low side kickback), a Schottky diode should be inserted between OUT and ground. Also,

if it is necessary to reduce IC heating during steady-state (constant speed) operation, it may be effective to insert a

Schottky diode between VCC and OUT. (This is effective because the load associated with the regenerative current

during PWM switching is born not by the on-chip diode but by the external diode.)

3. Current Limiter Circuit

The current limiter circuit limits the peak level of the current to a level determined by I = VRF/Rf (where VRF =

0.5V (typical) and Rf is the value of the current detection resistor). The current limiter operates by reducing the

output on duty to suppress the current.

The current limiter circuit detects the reverse recovery current of the diode due to PWM operation. To assure that the

current limiting function does not malfunction, its operation has a delay of about 2

μs. If the motor coils have a low

resistance or a low inductance, current fluctuations at startup (when there is no reactive power in the motor) will be

rapid. The delay in this circuit means that at such times the current limiter circuit may operate at a point well above

the set current. Designers must take this increase in the current due to the delay into account when setting the current

limiter value.

36

VCC