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IZ74LV32 Folha de dados(PDF) 2 Page - System Logic Semiconductor

Nome de Peças IZ74LV32
Descrição Electrónicos  Quad 2-Input OR Gate
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Fabricante Electrônico  SLS [System Logic Semiconductor]
Página de início  http://www.slsemicon.co.kr/e_index.htm
Logo SLS - System Logic Semiconductor

IZ74LV32 Folha de dados(HTML) 2 Page - System Logic Semiconductor

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SL74LV32
2
System Logic
Semiconductor
SLS
MAXIMUM RATINGS
*
Symbol
Parameter
Value
Unit
VCC
DC supply voltage (Referenced to GND)
-0.5
÷ +5.0
V
IIK *
1
DC input diode current
±20
mA
IOK *
2
DC output diode current
±50
mA
IO *
3
DC output source or sink current
-bus driver outputs
±25
mA
ICC
DC VCC current for types with
- bus driver outputs
±50
mA
IGND
DC GND current for types with
- bus driver outputs
±50
mA
PD
Power dissipation per package, plastic DIP+
SOIC package+
750
500
mW
Tstg
Storage temperature
-65
÷ +150
°C
TL
Lead temperature, 1.5 mm from Case for 10 seconds
(Plastic DIP ), 0.3 mm (SOIC Package)
260
°C
*Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 12 mW/
°C from 70° to 125°C
SOIC Package: : - 8 mW/
°C from 70° to 125°C
*
1: V
I
< -0.5V or V
I
> V
CC+0.5V
*
2: Vo
< -0.5V or Vo > V
CC+0.5V
*
3: -0.5V
< Vo < V
CC+0.5V
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Max
Unit
VCC
DC Supply Voltage (Referenced to GND)
1.2
3.6
V
VIN, VOUT
DC Input Voltage, Output Voltage (Referenced to GND)
0
VCC
V
TA
Operating Temperature, All Package Types
-40
+125
°C
tr, tf
Input Rise and Fall Time
VCC =1.2 V
VCC =2.0 V
VCC =3.0 V
VCC =3.6 V
0
0
0
0
1000
700
500
400
ns
This device contains protection circuitry to guard against damage due to high static voltages or electric
fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages
to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range GND
≤(V
IN or
VOUT)
≤V
CC.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused
outputs must be left open.


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