TMP104

SBOS564A

– NOVEMBER 2011 – REVISED NOVEMBER 2011

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This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more

susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

PACKAGE

PRODUCT

PACKAGE-LEAD

DESIGNATOR

PACKAGE MARKING

ORDERING NUMBER

TMP104YFFR

TMP104

DSBGA-4

YFF

T4

TMP104YFFT

(1)

For the most current package and ordering information, see the Package Option Addendum at the end of this document, or visit the

device product folder at www.ti.com.

ABSOLUTE MAXIMUM RATINGS

(1)

TMP104

UNIT

Supply voltage

3.6

V

Input voltage

–0.3 to (V+) + 0.3

V

Operating temperature

–55 to +150

°C

Storage temperature

–60 to +150

°C

Junction temperature

+150

°C

Human body model (HBM)

2000

V

ESD rating

Charged device model (CDM)

1000

V

Machine model (MM)

200

V

(1)

Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may

degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond

those specified is not supported.

THERMAL INFORMATION

TMP104

YFF

UNITS

4 PINS

Junction-to-ambient thermal resistance

188.5

Junction-to-case (top) thermal resistance

2.1

Junction-to-board thermal resistance

35.1

°C/W

Junction-to-top characterization parameter

10.6

Junction-to-board characterization parameter

35.1

Junction-to-case (bottom) thermal resistance

N/A

(1)

For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

2

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© 2011, Texas Instruments Incorporated

Product Folder Link(s): TMP104