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MC0.063W060350R Folha de dados(PDF) 1 Page - Analog Devices

Nome de Peças MC0.063W060350R
Descrição Electrónicos  Evaluation Board User Guide
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Fabricante Electrônico  AD [Analog Devices]
Página de início  http://www.analog.com
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MC0.063W060350R Folha de dados(HTML) 1 Page - Analog Devices

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Evaluation Board User Guide
UG-272
One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com
Evaluating the AD9833 Low Power 12.65 mW, 2.3 V to 5.5 V, Programmable
Waveform Generator
PLEASE SEE THE LAST PAGE FOR AN IMPORTANT
WARNING AND LEGAL TERMS AND CONDITIONS.
Rev. A | Page 1 of 12
FEATURES
Full featured evaluation board for the AD9833 evaluation
board
Graphical user interface software for board control and data
analysis
Connector to EVAL-SDP-CB1Z system demonstration
platform (SDP) board
Various power supply and reference link options
APPLICATIONS
Biomedical sensors
Bioelectrical impedance analysis
Electrochemical analysis
Impedance spectroscopy
Complex impedance measurement
Nondestructive testing
GENERAL DESCRIPTION
The AD9833 is a 25 MHz low power DDS device capable of
producing high performance sine and triangular outputs. It
also has an on-board comparator that allows a square wave to
be produced for clock generation. Consuming only 13 mW of
power at 3 V makes the AD9833 an ideal candidate for power-
sensitive applications.
The EVAL-AD9833SDZ board is used in conjunction with an
EVAL-SDP-CB1Z SDP board available from Analog Devices, Inc.
The USB-to-SPI communication to the AD9837 is completed
using this Blackfin®-based development board.
A high performance, on-board 25 MHz trimmed general
oscillator is available to use as the master clock for the AD9837
system. Various links and SMB connectors are also available on
the EVAL-AD9833SDZ board to maximize usability.
Complete specifications for the AD9833 are provided in the
AD9833 data sheet, available from Analog Devices, and should
be consulted in conjunction with this user guide when using the
evaluation board.
FUNCTIONAL BLOCK DIAGRAM
SDATA
FSYNC
MCLK
AD9833
EVAL-SDP-CB1Z
REF196
USB
SPORT
VOUT
MCLK XO
SCLK
Figure 1.


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