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UC1825A-SP Folha de dados(PDF) 9 Page - Texas Instruments |
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UC1825A-SP Folha de dados(HTML) 9 Page - Texas Instruments |
9 / 16 page CONTROL METHODS UDG-95109 UDG-95110 Current Mode Voltage Mode . SYNCHRONIZATION UDG-95113 UDG-95112 UC1825A-SP www.ti.com ..................................................................................................................................................... SLUS873A – JANUARY 2009 – REVISED APRIL 2009 Figure 8. Control Methods The oscillator can be synchronized by an external pulse inserted in series with the timing capacitor. Program the free running frequency of the oscillator to be 10% to 15% slower than the desired synchronous frequency. The pulse width should be greater than 10 ns and less than half the discharge time of the oscillator. The rising edge of the CLK/LEB pin can be used to generate a synchronizing pulse for other chips. Note that the CLK/LEB pin no longer accepts an incoming synchronizing signal. Figure 9. General Oscillator Synchronization Figure 10. Two Unit Interface Figure 11. Operational Waveforms Copyright © 2009, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Link(s): UC1825A-SP |
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