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MC74VHCT240ADWRG Folha de dados(PDF) 2 Page - ON Semiconductor

Nome de Peças MC74VHCT240ADWRG
Descrição Electrónicos  Octal Bus Buffer/Line Driver Inverting with 3?뭆tate Outputs
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Fabricante Electrônico  ONSEMI [ON Semiconductor]
Página de início  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

MC74VHCT240ADWRG Folha de dados(HTML) 2 Page - ON Semiconductor

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MC74VHCT240A
http://onsemi.com
2
Figure 1. Logic Diagram
DATA
INPUTS
A1
A2
A3
A4
B1
B2
B3
B4
17
15
13
11
8
6
4
218
16
14
12
9
7
5
3
YB4
YB3
YB2
YB1
YA4
YA3
YA2
YA1
INVERTING
OUTPUTS
OUTPUT
ENABLES
OEA
OEB
1
19
Figure 2. Pin Assignment
A3
A2
YB4
A1
OEA
GND
YB1
A4
YB2
YB3
5
4
3
2
1
10
9
8
7
6
14
15
16
17
18
19
20
11
12
13
YA2
B4
YA1
OEB
VCC
B1
YA4
B2
YA3
B3
OEA, OEB
A, B
YA, YB
L
L
H
L
H
X
H
L
Z
INPUTS
OUTPUTS
FUNCTION TABLE
MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
VCC
DC Supply Voltage
– 0.5 to + 7.0
V
Vin
DC Input Voltage
– 0.5 to + 7.0
V
Vout
DC Output Voltage
Output in 3−State
High or Low State
– 0.5 to + 7.0
– 0.5 to VCC + 0.5
V
IIK
Input Diode Current
− 20
mA
IOK
Output Diode Current (VOUT < GND; VOUT > VCC)
± 20
mA
Iout
DC Output Current, per Pin
± 25
mA
ICC
DC Supply Current, VCC and GND Pins
± 75
mA
PD
Power Dissipation in Still Air,
SOIC Packages†
TSSOP Package†
500
450
mW
Tstg
Storage Temperature
– 65 to + 150
_C
Maximum ratings are those values beyond which device damage can occur. Maximum ratings
applied to the device are individual stress limit values (not normal operating conditions) and are
not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
†Derating − SOIC Packages: – 7 mW/_C from 65_ to 125_C
TSSOP Package: − 6.1 mW/_C from 65_ to 125_C
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Max
Unit
VCC
DC Supply Voltage
4.5
5.5
V
Vin
DC Input Voltage
0
5.5
V
Vout
DC Output Voltage
Output in 3−State
High or Low State
0
0
5.5
VCC
V
TA
Operating Temperature
− 40
+ 85
_C
tr, tf
Input Rise and Fall Time
VCC =5.0V ±0.5V
0
20
ns/V
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high−impedance cir-
cuit. For proper operation, Vin and
Vout should be constrained to the
range GND v (Vin or Vout) v VCC.
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.


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