ST1284

Technical information

Doc ID 6976 Rev 4

7/10

By taking into account these following hypothesis:

This confirms the very low remaining voltage across the device to be protected. It is also

important to note that in this approximation the parasitic inductance effect was not taken into

account. This could be few tenths of volts during few ns at the input side. This parasitic effect

is not present at the output side due the low current involved after the resistance R.

The measurements done here after show very clearly (Figure 9) the high efficiency of the

ESD protection:

–

strike)

Figure 8.

Measurement conditions

Figure 9.

Remaining voltage at the input and output of the device during a ±16 kV

ESD surge (IEC 61000-4-2)

Vinput

R

g

V

BR

R

d

V

PP

⋅

+

⋅

R

g

---------------------------------------------------

=

Voutput

R

t

V

BR

R

d

Vinput

⋅

+

⋅

R

t

----------------------------------------------------------

=

ST1284

Vinput

Voutput

ESD

SURGE