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AD13280AZ Folha de dados(PDF) 3 Page - Analog Devices |
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AD13280AZ Folha de dados(HTML) 3 Page - Analog Devices |
3 / 20 page REV. 0 –3– AD13280 Test Mil AD13280AZ/BZ Parameter Temp Level Subgroup Min Typ Max Unit SPURIOUS-FREE DYNAMIC RANGE 1, 8 Analog Input @ 10 MHz 25 °C I 4 75 80 dBFS Min II 6 70 Max II 5 75 Analog Input @ 21 MHz 25 °C I 4 68 75 dBFS Min II 6 67 Max II 5 68 Analog Input @ 37 MHz 25 °C I 4 56 62 dBFS Min II 6 55 Max II 5 56 SINGLE-ENDED ANALOG INPUT Passband Ripple to 10 MHz 25 °C V 0.05 dB Passband Ripple to 25 MHz 25 °C V 0.1 dB DIFFERENTIAL ANALOG INPUT Passband Ripple to 10 MHz 25 °C V 0.3 dB Passband Ripple to 25 MHz 25 °C V 0.82 dB TWO-TONE IMD REJECTION 9 fIN = 9.1 MHz and 10.1 MHz 25 °C I 4 75 80 dBc f1 and f2 are –7 dB Min II 6 71 Max II 5 75 fIN = 19.1 MHz and 20.7 MHz 25 °C V 4 77 dBc f1 and f2 are –7 dB fIN = 36 MHz and 37 MHz 25 °C V 4 60 dBc f1 and f2 are –7 dB CHANNEL-TO-CHANNEL ISOLATION 10 25 °CIV 12 90 dB TRANSIENT RESPONSE 25 °CV 25 ns DIGITAL OUTPUTS 11 Logic Compatibility CMOS DVCC = 3.3 V Logic “1” Voltage Full I 1, 2, 3 2.5 DVCC – 0.2 V Logic “0” Voltage Full I 1, 2, 3 0.2 0.5 V DVCC = 5 V Logic “1” Voltage Full V DVCC – 0.3 V Logic “0” Voltage Full V 0.35 V Output Coding Two’s Complement POWER SUPPLY AVCC Supply Voltage 12 Full IV 4.85 5.0 5.25 V I (AVCC) Current Full I 1, 2, 3 310 338 mA AVEE Supply Voltage 12 Full IV –5.25 –5.0 –4.75 V I (AVEE) Current Full I 1, 2, 3 38 49 mA DVCC Supply Voltage 12 Full IV 3.135 3.3 3.465 V I (DVCC) Current Full I 1, 2, 3 34 46 mA ICC (Total) Supply Current per Channel Full I 1, 2, 3 369 433 mA Power Dissipation (Total) Full I 1, 2, 3 3.72 4.05 W Power Supply Rejection Ratio (PSRR) Full V 0.01 % FSR/% VS NOTES 1 All ac specifications tested by driving ENCODE and ENCODE differentially. Single-ended input: AMP-IN-X-1 = 1 V p-p, AMP-IN-X-2 = GND. 2 Gain tests are performed on AMP-IN-X-1 input voltage range. 3 Full Power Bandwidth is the frequency at which the spectral power of the fundamental frequency (as determined by FFT analysis) is reduced by 3 dB. 4 For differential input: +IN = 1 V p-p and –IN = 1 V p-p (signals are 180 ° out of phase). For single-ended input: +IN = 2 V p-p and = –IN = GND. 5 Minimum and maximum conversion rates allow for variation in Encode Duty Cycle of 50% ± 5%. 6 Analog Input signal power at –1 dBFS; signal-to-noise ratio (SNR) is the ratio of signal level to total noise (first five harmonics removed). Encode = 80 MSPS. SNR is reported in dBFS, related back to converter full scale. 7 Analog Input signal power at –1 dBFS; signal-to-noise and distortion (SINAD) is the ratio of signal level to total noise + harmonics. Encode = 80 MSPS. SINAD is reported in dBFS, related back to converter full scale. 8 Analog Input signal at –1 dBFS; SFDR is ratio of converter full scale to worst spur. 9 Both input tones at –7 dBFS; two tone intermodulation distortion (IMD) rejection is the ratio of either tone to the worst third order intermod product. 10Channel-to-channel isolation tested with A channel grounded and a full-scale signal applied to B Channel. 11 Digital output logic levels: DV CC = 3.3 V, CLOAD = 10 pF. Capacitive loads > 10 pF will degrade performance. 12 Supply voltage recommended operating range. AV CC may be varied from 4.85 V to 5.25 V. However, rated ac (harmonics) performance is valid only over the range AVCC = 5.0 V to 5.25 V. Specifications subject to change without notice. |
Nº de peça semelhante - AD13280AZ |
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Descrição semelhante - AD13280AZ |
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