AD1848K

REV. 0

–6–

ORDERING GUIDE

Temperature

Package

Package

Model

Range

Description

Option

AD1848KP

–40

°C to +85°C 68-Lead PLCC P-68A

AD1848KST

–40

°C to +85°C 64-Lead TQFP ST-64

ABSOLUTE MAXIMUM RATINGS*

Min

Max

Units

Power Supplies

–0.3

6.0

V

–0.3

6.0

V

Input Current

(Except Supply Pins)

±10.0

mA

Analog Input Voltage (Signal Pins) –0.3

(VA+) + 0.3 V

Digital Input Voltage (Signal Pins) –0.3

(VD+) + 0.3 V

Ambient Temperature (Operating) –40

+85

°C

Storage Temperature

–65

+150

°C

ESD Tolerance (Human Body

Model per Method 3015.2

of MIL-STD-883B)

1000

V

*Stresses greater than those listed under “Absolute Maximum Ratings” may cause

permanent damage to the device. This is a stress rating only and functional

operation of the device at these or any other conditions above those indicated in

the operational section of this specification is not implied. Exposure to absolute

maximum rating conditions for extended periods may affect device reliability.

WARNING!

ESD SENSITIVE DEVICE

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily

accumulate on the human body and test equipment and can discharge without detection.

Although the AD1848K features proprietary ESD protection circuitry, permanent damage may

occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD

precautions are recommended to avoid performance degradation or loss of functionality.

68-Lead Plastic Leaded Chip Carrier Pinout

ADR0

CDRQ

PDRQ

V

DD

GNDD

XTAL1I

XTAL1O

GNDD

R_FILT

V

DD

GNDD

XTAL2I

XTAL2O

V

DD

PWRDWN

PDAK

CDAK

67 66 65

68

1

2

3

63

62 61

64

54

6

7

8

9

16

17

18

19

20

21

22

23

24

25

26

10

11

12

13

14

15

37 38

39

35

34

33

41 42

43

40

31 32

30

29

28

27

36

53

52

50

49

47

46

45

44

60

59

58

57

56

55

51

48

54

RD

XCTL1

INT

XCTL0

NC

V

DD

GNDD

NC

V

DD

GNDD

CS

NC

NC

NC

NC

NC

NC

AD1848K

TOP VIEW

NC = NO CONNECT

64-Lead Thin Quad Flatpack Pinout

AD1848K

TOP VIEW

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

RD

XCTL1

INT

XCTL0

NC

V

DD

GNDD

NC

CS

NC

NC

R_AUX2

WR

V

DD

GNDD

R_AUX1

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

ADR0

CDRQ

PDRQ

V

DD

GNDD

XTAL1I

XTAL1O

GNDD

V

DD

GNDD

XTAL2I

XTAL2O

V

DD

PWRDWN

PDAK

CDAK

56 55

54

53

52

51

50

49

64

63

62

61

60

59

58

57

17

18

19

20

21

22

23

24

25

26

27

28 29

30

31

32

NC = NO CONNECT