Os motores de busca de Datasheet de Componentes eletrônicos |
|
AD8018 Folha de dados(PDF) 9 Page - Analog Devices |
|
AD8018 Folha de dados(HTML) 9 Page - Analog Devices |
9 / 19 page REV. 0 AD8018 –9– Table I. Resistor Selection Guide Gain RF ( )RG ( ) –1 681 681 +1 1 k ∞ +2 750 750 +3 511 256 +4 340 113 +5 230 59 POWER-DOWN FEATURES Two digitally programmable logic pins, PWDN1 and PWDN0, are available on the TSSOP-14 package to select among three different modes of operation, full power, standby and shutdown. The DGND pin is the logic ground reference. The logic thresh- old voltage is established 1 V above DGND. In a typical 5 V single-supply application, the DGND pin is connected to analog ground. If PWDN1, PWDN0, and DGND are left unconnected, the AD8018 will operate at full power. Table II. Power-Down Features and Truth Table Supply Output PWDN0 PWDN1 State Current Impedance High High Full Power 18 mA Low Low High Standby 9 mA Low High Low Standby 9 mA Low Low Low Disabled 300 µA High POWER SUPPLY AND DECOUPLING The AD8018 can be powered with a good quality (i.e., low-noise) supply anywhere in the range from 3.3 V to 8 V. However, in order to optimize the ADSL upstream drive capability to +13 dBm and maintain the best Spurious Free Dynamic Range (SFDR), the AD8018 circuit should be supplied with a well regulated 5 V supply. The 5 V supplied at the USB port may be poorly regu- lated. Improving the quality of the 5 V supply will optimize the performance of the AD8018 in a USB-supplied CPE ADSL modem. This can be accomplished through the use of a step-up dc-to-dc converter or switching power supply followed by a low dropout (LDO) regulator such as the ADP3331 (see Figure 6). Setting R1 to be 953 k Ω and R2 to be 301 kΩ will result in a VOUT of 5 V. Careful attention must be paid to decoupling the power supply pins at the output of the dc-to-dc converter, the output of the LDO regulator and the supply pins of the AD8018. High-quality capacitors with low equivalent series resistance (ESR) such as multilayer ceramic capacitors (MLCCs) should be used to mini- mize supply voltage ripple and power dissipation. A large, usually tantalum, 10 µF to 47 µF capacitor located in proximity to the AD8018 is required to provide good decoupling for lower fre- quency signals. In addition, 0.1 µF MLCC decoupling capacitors should be located as close to each of the power supply pins as is physically possible, no more than 1/8 inch away. An additional large (4.7 µF to 10 µF) tantalum capacitor should be placed on the board near the supply terminals to supply current for fast, large- signal changes at the AD8018 outputs. ADP3331 C1 0.47 F VIN ON OFF VOUT EOUT C2 0.47 F R3 330k IN SD GND OUT FB ERR R1 953k R2 301k Figure 6. ADP3331 LDO METHOD FOR GENERATING A MIDSUPPLY VOLTAGE To operate an amplifier on a single voltage supply, a voltage midway between the supply and ground must be generated to properly bias the inputs and the outputs. A voltage divider can be created with two equal value resistors (Figure 7). There is a trade-off between the power consumed by the divider and the voltage drop across these resistors due to the positive input bias currents. Selecting 2.5 k Ω for R1 and R2 will create a voltage divider that draws only 1 mA from a 5 V supply. The voltage generated with this topology can vary due to the temperature coefficient (TC) of resistance. Resistors that are closely matched and have a low TC will minimize variations in the voltage reference due to temperature. One should also be sure to use a decoupling capacitor (0.1 µF) at the node where VREF is generated. 5V R1 2.5k R2 2.5k VREF 0.1 F Figure 7. Midsupply Reference DIFFERENTIAL TESTING The test circuit shown in TPC 13 is used for measuring the dif- ferential distortion of the AD8018. A single-ended test signal is applied to the inverting input of the AD8138 differential driver with the noninverting input grounded. Applying the differential output of the AD8138 through 100 Ω resistors serves to isolate the inputs of the AD8018 differential driver and provide a well- balanced low-distortion input signal. The differential load (RL) of the AD8018 can be set to the equivalent of the line imped- ance reflected through a transformer. The AD9632 converts the differential output voltage back to a single-ended signal. The differential-to- single-ended converter using the AD9632 has an attenuation of –26 dB and is wired with precision resis- tors to optimize the balance of differential input signal. The resulting smaller output signal can be easily measured using a 50 Ω spectrum analyzer. |
Nº de peça semelhante - AD8018 |
|
Descrição semelhante - AD8018 |
|
|
Ligação URL |
Privacy Policy |
ALLDATASHEETPT.COM |
ALLDATASHEET é útil para você? [ DONATE ] |
Sobre Alldatasheet | Publicidade | Contato conosco | Privacy Policy | roca de Link | Lista de Fabricantes All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |