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74ACTQ464ASPC Folha de dados(PDF) 6 Page - Fairchild Semiconductor

Nome de Peças 74ACTQ464ASPC
Descrição Electrónicos  Quiet Series??Octal Transceiver/Register with 3-STATE Outputs
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Fabricante Electrônico  FAIRCHILD [Fairchild Semiconductor]
Página de início  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

74ACTQ464ASPC Folha de dados(HTML) 6 Page - Fairchild Semiconductor

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AC Electrical Characteristics for ACQ
Note 14: Voltage Range 3.3 is 3.3V
± 0.3V.
Voltage Range 5.0 is 5.0V
± 0.5V
Note 15: Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs within the same packaged device.
The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH). Parameter guaranteed by
design. Not tested.
AC Operating Requirements for ACQ
Note 16: Voltage Range 5.0 is 5.0V
± 0.5V
Voltage Range 3.3 is 3.3V
± 0.3V
VCC
TA = +25°CTA = −40°C to +85°C
Symbol
Parameter
(V)
CL = 50 pF
CL = 50 pF
Units
(Note 14)
Min
Typ
Max
Min
Max
tPLH
Propagation Delay
3.3
3.5
9.0
12.0
3.5
13.0
ns
Bus to Bus
5.0
2.5
6.5
9.0
2.5
9.5
tPHL
Propagation Delay
3.3
3.5
9.0
12.0
3.5
13.0
ns
Bus to Bus
5.0
2.5
6.5
9.0
2.5
9.5
tPLH
Propagation Delay
3.3
3.5
10.0
13.0
3.5
14.0
ns
Clock to Bus
5.0
2.5
7.0
9.5
2.5
10.5
tPHL
Propagation Delay
3.3
3.5
10.0
13.0
3.5
14.0
ns
Clock to Bus
5.0
2.5
7.0
9.5
2.5
10.5
tPLH
Propagation Delay
3.3
3.5
9.5
12.5
3.5
13.5
SBA or SAB to An or Bn
5.0
2.5
6.5
9.0
2.5
10.0
ns
(w/An or Bn HIGH or LOW)
tPHL
Propagation Delay
3.3
3.5
9.5
12.5
3.5
13.5
SBA or SAB to An or Bn
5.0
2.5
6.5
9.0
2.5
10.0
ns
(w/An or Bn HIGH or LOW)
tPZH
Enable Time
3.3
3.5
10.5
14.5
3.5
15.5
ns
G to An or Bn
5.0
2.5
8.0
10.5
2.5
11.5
tPZL
Enable Time
3.3
3.5
10.5
14.5
3.5
15.5
ns
G to An or Bn
5.0
2.5
8.0
10.5
2.5
11.5
tPHZ
Disable Time
3.3
2.5
8.0
11.0
2.5
12.0
ns
G to An or Bn
5.0
1.5
5.0
7.5
1.5
8.0
tPLZ
Disable Time
3.3
2.5
8.0
11.0
2.5
12.0
ns
G to An or Bn
5.0
1.5
5.0
7.5
1.5
8.0
tPZH
Enable Time
3.3
4.5
11.0
15.5
4.5
17.0
ns
DIR to An or Bn
5.0
3.0
8.5
11.0
3.0
11.5
tPZL
Enable Time
3.3
4.5
11.0
15.5
4.5
17.0
ns
DIR to An or Bn
5.0
3.0
8.5
11.0
3.0
11.5
tPHZ
Disable Time
3.3
1.5
8.0
11.0
1.5
12.0
ns
DIR to An or Bn
5.0
1.0
5.0
7.5
1.0
8.0
tPLZ
Disable Time
3.3
1.5
8.0
11.0
1.5
12.0
ns
DIR to An or Bn
5.0
1.0
5.0
7.5
1.0
8.0
tOS
Output to Output Skew (Note 15)
3.3
1.0
1.5
1.5
ns
5.0
0.5
1.0
1.0
Symbol
Parameter
VCC
TA = +25°CTA = −40°C to +85°C
Units
(Note 16)
Typ
Guaranteed Minimum
tS
Setup Time, HIGH or LOW
3.3
3.0
3.0
ns
Bus to Clock
5.0
3.0
3.0
tH
Hold Time, HIGH or LOW
3.3
1.5
1.5
ns
Bus to Clock
5.0
1.5
1.5
tW
Clock Pulse Width
3.3
4.0
4.0
ns
HIGH or LOW
5.0
4.0
4.0


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