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74LVQ174SC Folha de dados(PDF) 4 Page - Fairchild Semiconductor

Nome de Peças 74LVQ174SC
Descrição Electrónicos  Low Voltage Hex D-Type Flip-Flop with Master Reset
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Fabricante Electrônico  FAIRCHILD [Fairchild Semiconductor]
Página de início  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

74LVQ174SC Folha de dados(HTML) 4 Page - Fairchild Semiconductor

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AC Electrical Characteristics
Symbol
Parameter
VCC
(V)
TA = +25˚C
CL = 50 pF
TA = −40˚C to +85˚C
CL = 50 pF
Units
Min
Typ
Max
Min
Max
fmax
Maximum Clock
2.7
60
90
50
MHz
Frequency
3.3 ±0.3
90
100
70
tPLH
Propagation Delay
2.7
2.0
10.8
16.2
1.5
18.0
ns
CP to Qn
3.3 ±0.3
2.0
9.0
11.5
1.5
12.5
tPHL
Propagation Delay
2.7
2.0
10.2
15.5
1.5
17.0
ns
CP to Qn
3.3 ±0.3
2.0
8.5
11.0
1.5
12.0
tPHL
Propagation Delay
2.7
2.5
10.8
16.2
2.0
18.0
ns
MR to Qn
3.3 ±0.3
2.5
9.0
11.5
2.0
12.5
tOSHL,
Output to
2.7
1.0
1.5
1.5
ns
tOSLH
Output Skew (Note 9)
3.3 ±0.3
1.0
1.5
1.5
Note 9: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The speci-
fication applies to any outputs switching in the same direction, either HIGH to LOW (tOSHL) or LOW to HIGH (tOSLH). Parameter guaranteed by design.
AC Operating Requirements
Symbol
Parameter
VCC
(V)
TA = +25˚C
CL = 50 pF
TA = −40˚C to +85˚C
CL = 50 pF
Units
Typ
Guaranteed Minimum
tS
Setup Time, HIGH or LOW
2.7
3.0
8.0
10.0
ns
Dn to CP
3.3 ±0.3
2.5
6.5
7.0
tH
Hold Time, HIGH or LOW
2.7
1.2
4.0
4.5
ns
Dn to CP
3.3 ±0.3
1.0
3.0
3.0
tW
MR Pulse Width, LOW
2.7
1.2
7.0
10.0
ns
3.3 ±0.3
1.0
5.5
7.0
tW
CP Pulse Width
2.7
1.2
7.0
10.0
ns
3.3 ±0.3
1.0
5.5
7.0
trec
Recovery Time
2.7
0
3.5
3.5
ns
MR to CP
3.3 ±0.3
0
2.5
2.5
Capacitance
Symbol
Parameter
Typ
Units
Conditions
CIN
Input Capacitance
4.5
pF
VCC = Open
CPD (Note 10)
Power Dissipation
23
pF
VCC = 3.3V
Capacitance
Note 10: CPD is measured at 10 MHz.
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