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74LVC02APW Folha de dados(PDF) 1 Page - NXP Semiconductors

Nome de Peças 74LVC02APW
Descrição Electrónicos  Quad 2-input NOR gate
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Fabricante Electrônico  NXP [NXP Semiconductors]
Página de início  http://www.nxp.com
Logo NXP - NXP Semiconductors

74LVC02APW Folha de dados(HTML) 1 Page - NXP Semiconductors

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1.
General description
The 74LVC02A provides four 2-input NOR gates.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these
devices as translators in mixed 3.3 V and 5 V applications.
2.
Features and benefits
5 V tolerant inputs for interfacing with 5 V logic
Wide supply voltage range from 1.2 V to 3.6 V
CMOS low power consumption
Direct interface with TTL levels
Complies with JEDEC standard:
JESD8-7A (1.65 V to 1.95 V)
JESD8-5A (2.3 V to 2.7 V)
JESD8-C/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-B exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
Specified from
40 Cto+85 C and 40 Cto+125 C
3.
Ordering information
74LVC02A
Quad 2-input NOR gate
Rev. 8 — 16 November 2011
Product data sheet
Table 1.
Ordering information
Type number
Package
Temperature range
Name
Description
Version
74LVC02AD
40 Cto +125 C
SO14
plastic small outline package; 14 leads;
body width 3.9 mm
SOT108-1
74LVC02ADB
40 Cto +125 C
SSOP14
plastic shrink small outline package; 14 leads;
body width 5.3 mm
SOT337-1
74LVC02APW
40 Cto +125 C
TSSOP14
plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
SOT402-1
74LVC02ABQ
40 Cto +125 C
DHVQFN14 plastic dual in-line compatible thermal enhanced very
thin quad flat package; no leads; 14 terminals;
body 2.5
 3  0.85 mm
SOT762-1


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