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ADuC841BS62-3 Folha de dados(PDF) 12 Page - Analog Devices

Nome de Peças ADuC841BS62-3
Descrição Electrónicos  MicroConverter짰 12-Bit ADCs and DACs with Embedded High Speed 62-kB Flash MCU
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Página de início  http://www.analog.com
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ADuC841BS62-3 Folha de dados(HTML) 12 Page - Analog Devices

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ADuC841/ADuC842/ADuC843
Rev. 0 | Page 12 of 88
TYPICAL PERFORMANCE CHARACTERISTICS
The typical performance plots presented in this section
illustrate typical performance of the ADuC841/ADuC842/
ADuC843 under various operating conditions.
Figure 5 and Figure 6 show typical ADC integral nonlinearity
(INL) errors from ADC Code 0 to Code 4095 at 5 V and 3 V
supplies, respectively. The ADC is using its internal reference
(2.5 V) and is operating at a sampling rate of 152 kHz; the
typical worst-case errors in both plots are just less than 0.3 LSB.
Figure 7 and Figure 8 also show ADC INL at a higher sampling
rate of 400 kHz. Figure 9 and Figure 10 show the variation in
worst-case positive (WCP) INL and worst-case negative (WCN)
INL versus external reference input voltage.
Figure 11 and Figure 12 show typical ADC differential
nonlinearity (DNL) errors from ADC Code 0 to Code 4095 at
5 V and 3 V supplies, respectively. The ADC is using its internal
reference (2.5 V) and is operating at a sampling rate of 152 kHz;
the typical worst-case errors in both plots are just less than
0.2 LSB. Figure 13 and Figure 14 show the variation in worst-
case positive (WCP) DNL and worst-case negative (WCN) DNL
versus external reference input voltage.
Figure 15 shows a histogram plot of 10,000 ADC conversion
results on a dc input with VDD = 5 V. The plot illustrates an
excellent code distribution pointing to the low noise
performance of the on-chip precision ADC.
Figure 16 shows a histogram plot of 10,000 ADC conversion
results on a dc input for VDD = 3 V. The plot again illustrates a
very tight code distribution of 1 LSB with the majority of codes
appearing in one output pin.
Figure 17 and Figure 18 show typical FFT plots for the parts.
These plots were generated using an external clock input. The
ADC is using its internal reference (2.5 V), sampling a full-scale,
10 kHz sine wave test tone input at a sampling rate of 149.79 kHz.
The resulting FFTs shown at 5 V and 3 V supplies illustrate an
excellent 100 dB noise floor, 71 dB signal-to-noise ratio (SNR),
and THD greater than –80 dB.
Figure 19 and Figure 20 show typical dynamic performance
versus external reference voltages. Again, excellent ac perform-
ance can be observed in both plots with some roll-off being
observed as VREF falls below 1 V.
Figure 21 shows typical dynamic performance versus sampling
frequency. SNR levels of 71 dB are obtained across the sampling
range of the parts.
Figure 22 shows the voltage output of the on-chip temperature
sensor versus temperature. Although the initial voltage output at
25°C can vary from part to part, the resulting slope of −1. 4 mV/°C
is constant across all parts.
ADC CODES
–1.0
0
511
1023
2047
2559
3071
–0.8
1535
3583
–0.6
–0.4
–0.2
0
0.2
0.4
0.6
0.8
1.0
AVDD / DVDD = 5V
fS = 152kHz
4095
Figure 5. Typical INL Error, VDD = 5 V, fs = 152 kHz
ADC CODES
1.0
511
1023
1535
2047
2559
0.6
0.2
–0.2
–0.6
–1.0
0.8
0.4
0
–0.4
–0.8
3071
3583
0
4095
AVDD /DVDD = 3V
f
S = 152kHz
Figure 6. Typical INL Error, VDD = 3 V, fs = 152 kHz


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