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ADV7612WBSWZ Folha de dados(PDF) 10 Page - Analog Devices |
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ADV7612WBSWZ Folha de dados(HTML) 10 Page - Analog Devices |
10 / 20 page ADV7612 Data Sheet Rev. D | Page 10 of 20 Pin No. Mnemonic Type Description 66 P3 Digital video output Video Pixel Output Port. 67 P2 Digital video output Video Pixel Output Port. 68 P1 Digital video output Video Pixel Output Port. 69 P0 Digital video output Video Pixel Output Port. 70 DVDDIO Power Digital I/O Supply Voltage (3.3 V). 71 DE Miscellaneous digital DE (data enable) is a signal that indicates active pixel data. 72 HS Digital video output HS is a horizontal synchronization output signal. 73 VS/FIELD/ALSB Digital video output VS is a vertical synchronization output signal. FIELD is a field synchronization output signal in all interlaced video modes. VS or FIELD can be configured for this pin. ALSB allows selection of the I2C address. 74 AP0 Miscellaneous digital Audio Output Pin. Pin AP0 to Pin AP5 can be configured to output S/PDIF digital audio output, HBR, DSD, DST, or I2S. 75 AP1 Miscellaneous digital Audio Output Pin. Pin AP0 to Pin AP5 can be configured to output S/PDIF digital audio output, HBR, DSD, DST, or I2S. 76 AP2 Miscellaneous digital Audio Output Pin. Pin AP0 to Pin AP5 can be configured to output S/PDIF digital audio output, HBR, DSD, DST, or I2S. 77 AP3 Miscellaneous ditial Audio Output Pin. Pin AP0 to Pin AP5 can be configured to output S/PDIF digital audio output, HBR, DSD, DST, or I2S. 78 AP4 Miscellaneous ditial Audio Output Pin. Pin AP0 to Pin AP5 can be configured to output S/PDIF digital audio output, HBR, DSD, DST, or I2S. 79 SCLK/INT2 Miscellaneous digital A dual function pin that can be configured to output an audio serial clock or an Interrupt 2 signal. 80 AP5 Miscellaneous Audio Output Pin. Pin AP0 to Pin AP5 can be configured to output S/PDIF digital audio output, HBR, DSD, DST, or I2S. Additionally, Pin AP5 can be configured to provide LRCLK. 81 MCLK/INT2 Miscellaneous A dual function pin that can be configured to output an audio master clock or an Interrupt 2 signal. 82 DVDD Power Digital Core Supply Voltage (1.8 V). 83 SCL Miscellaneous digital I2C Port Serial Clock Input. SCL is the clock line for the control port. 84 SDA Miscellaneous digital I2C Port Serial Data Input/Output Pin. SDA is the data line for the control port. 85 INT1 Miscellaneous digital Interrupt. This pin can be active low or active high. When status bits change, this pin is triggered. The events that trigger an interrupt are under user configuration. 86 RESET Miscellaneous digital System Reset Input. Active low. A minimum low reset pulse width of 5 ms is required to reset the ADV7612 circuitry. 87 CS Miscellaneous digital Chip Select. This pin has an internal pull-down. Pulling this line up causes I2C state machine to ignore I2C transmission. 88 PVDD Power PLL Supply Voltage (1.8 V). 89 XTALP Miscellaneous analog Input Pin for 28.63636 MHz Crystal or an External 1.8 V, 28.63636 MHz Clock Oscillator Source to Clock the ADV7612. 90 XTALN Miscellaneous analog Crystal Input. Input pin for 28.63636 MHz crystal. This pin should be left unconnected if XTALP is driven with 1.8 V clock signal. 91 DVDD Power Digital Core Supply Voltage (1.8 V). 92 CEC Digital input/output Consumer Electronic Control Channel. 93 DDCB_SCL HDMI input HDCP Slave Serial Clock Port B. DDCB_SCL is a 3.3 V input that is 5 V tolerant. 94 DDCB_SDA HDMI input HDCP Slave Serial Data Port B. DDCB_SDA is a 3.3 V input that is 5 V tolerant. 95 RXB_5V HDMI input 5 V Detect Pin for Port B in the HDMI Interface. 96 HPA_B Miscellaneous digital Hot Plug assert signal output for HDMI Port B. 97 DDCA_SCL HDMI input HDCP Slave Serial Clock Port A. DDCA_SCL is a 3.3 V input that is 5 V tolerant. 98 DDCA_SDA HDMI input HDCP Slave Serial Data Port A. DDCA_SDA is a 3.3 V input that is 5 V tolerant. 99 RXA_5V HDMI input 5 V Detect Pin for Port A in the HDMI Interface. 100 HPA_A/INT2 Miscellaneous digital A dual function pin that can be configured to output Hot Plug assert signal (for HDMI Port A) or an Interrupt 2 signal. |
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