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ST1L05CPU33R Folha de dados(PDF) 11 Page - STMicroelectronics |
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ST1L05CPU33R Folha de dados(HTML) 11 Page - STMicroelectronics |
11 / 30 page DocID14492 Rev 3 11/30 ST1L05 Electrical characteristics 30 Refer to the typical application schematic, VI = 4.5 V to 5.5 V, VEN = 2 V, IO = 5 mA to 1.3 A, CI = CO = 4.7 µF, TJ = 0 to 125 °C, unless otherwise specified. Intended typical value is TJ = 25 °C unless otherwise specified. Table 8. ST1L05CPU33R electrical characteristics Symbol Parameter Test conditions Min. Typ. Max. Unit VO Output voltage VI = 4.75 V to 5.25 V, T = 25 °C 3.234 3.3 3.366 V VO Output voltage VI = 4.75 V to 5.25 V 3.2175 3.3 3.3825 V ΔVO Line regulation VI = 4.75 V to 5.25 V 15 mV ΔVO Load regulation VI = 4.75 V, IO = 10 mA to 1.3 A 15 30 mV IS Output current limit VI = 5.5 V 1.3 A IOMIN Minimum output current for regulation 0mA Vd Dropout voltage IO = 0.8 A 0.2 0.4 V IO = 1 A 0.25 0.45 V IO = 1.3 A 0.3 0.5 V IQ Quiescent current VI = 5 V, IO = 2 mA to 1.3 A, T = 25 °C 350 500 µA VI = 5.5 V, IO = 2 mA to 1.3 A 350 650 VEN_H Enable threshold high VI = 4.5 V to 5.25, IO = 50 mA 2 V VEN_L Enable threshold low VI = 4.5 V to 5.25, IO = 50 mA 0.8 IEN Enable pin current VEN = VI = 5 V 2 µA SVR Supply voltage rejection(1) VI = 5 ± 0.5 V, IO = 5 mA, f = 120 Hz 50 65 dB eN RMS output noise(1) B = 10 Hz to 10 kHz, VI = 5 V, IO = 5 mA 0.003 %VO ΔVO/ΔIO Load transient (rising) (1)(2) VI = 5 V, any 200 mA step from 100 mA to 1.3 A, tR ≥ 1 µs 5%VO ΔVO/ΔIO Load transient (falling)(1)(2) VI = 5 V, IO = 1.3 A to 10 mA, tF ≥ 1 µs 3.6 V ΔVO/ΔVI Start-up transient (1)(2) VI = 0 V to 5 V, IO = 10 mA to 1.3 A, tR ≥ 1 µs 3.5 V ΔVO/ΔIO Short-circuit removal response (1)(2) VI = 5 V, IO = short to 10 mA 3.5 V TSH Thermal shutdown trip point(1) VI = 5 V 165 °C 1. Guaranteed by design. Not tested in production. 2. CI =10 µF, CO =10 µF, all X7R ceramic capacitors. |
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