TS5A6542 datasheet(8/23 Pages) TI1

Nome de Peças	TS5A6542

Descrição Electrónicos	0.75-廓 SPDT ANALOG SWITCH WITH INPUT LOGIC TRANSLATION

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TS5A6542

SCDS211C – AUGUST 2006 – REVISED DECEMBER 2009

www.ti.com

ELECTRICAL CHARACTERISTICS FOR 2.5-V SUPPLY

(1)

V+ = 2.25 V to 2.75 V, VIO = 1.65 V to 1.95 V, TA = –40°C to 85°C (unless otherwise noted)

PARAMETER

SYMBOL

TEST CONDITIONS

TA

V+

MIN

TYP MAX

UNIT

Analog Switch

VCOM,

Analog signal range

0

V+

V

VNO

25°C

1

1.3

VNO or VNC = 1.8 V,

Switch ON,

ON-state resistance

ron

2.25 V

Ω

ICOM = –100 mA,

See Figure 14

Full

1.6

ON-state resistance

VNO or VNC = 1.8 V,

25°C

0.15

0.2

Switch ON,

match between

Δron

0.8 V,

2.25 V

Ω

See Figure 14

Full

0.2

channels

ICOM = –100 mA,

0

≤ (VNO or VNC) ≤ V+,

Switch ON,

25°C

0.5

ICOM = –100 mA,

See Figure 14

ON-state resistance

ron(flat)

2.25 V

Ω

VNO or VNC = 0.8 V, 1 V,

25°C

0.25

0.5

flatness

Switch ON,

1.8 V,

See Figure 14

Full

0.6

ICOM = –100 mA,

VNO = 0.5 V, 2.2 V,

25°C

–20

2

20

VCOM = 2.2 V, 0.5 V,

VNC = Open,

NO, NC

INO(OFF), INC

Switch OFF,

or

2.75 V

nA

OFF leakage current

(OFF)

See Figure 15

Full

–50

50

VNC = 0.5 V, 2.2 V,

VCOM = 2.2 V, 0.5 V,

VNO = Open,

VNO = 0.5 V, 2.2 V,

25°C

–10

2

10

VNC and VCOM = Open,

NC, NO

Switch ON,

INO(ON)

or

2.75 V

nA

ON leakage current

See Figure 16

Full

–20

20

VNC = 2.2 V, 0.5 V,

VNO and VCOM = Open,

VCOM = 0.5 V,

25°C

–10

2

10

VNO and VNC = Open,

COM

Switch ON,

ICOM(ON)

or

2.75 V

nA

ON leakage current

See Figure 16

Full

–20

20

VCOM = 2.2 V,

VNO and VNC = Open,

Digital Control Input (IN)(2)

0.65

Input logic high

VIH

VIO = 1.65 V to 1.95 V

Full

VIO

V

× VIO

0.35

Input logic low

VIL

VIO = 1.65 V to 1.95 V

Full

0

V

× VIO

25°C

–2

2

Input leakage current

IIH, IIL

VI = VIO or 0

2.75 V

nA

Full

–20

20

(1)

The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum

(2)

All unused digital inputs of the device must be held at VIO or GND to ensure proper device operation. Refer to the TI application report,

Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

8

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