FUNCTIONAL BLOCK DIAGRAM

1

2

3

4

5

6

7

8

9

10

11

12

13

14

28

27

26

25

24

23

22

21

20

19

18

17

16

15

L

RCK

WCLK

BCLK

DGND1

RDEDGE

S/

M

384/

256

CAPL1

CAPL2

AGNDL

CLKIN

TAG

SOUT

RESET

MSBDLY

R

LJUST

AGND

CAPR1

CAPR2

AGNDR

SERIAL OUTPUT

INTERFACE

THREE-STAGE FIR

DECIMATION

FILTER

DGND2

THREE-STAGE FIR

DECIMATION

FILTER

CLOCK

DIVIDER

VOLTAGE

REFERENCE

DAC

SINGLE-TO-

DIFFERENTIAL INPUT

CONVERTER

SINGLE-TO-

DIFFERENTIAL INPUT

CONVERTER

AD1870

DAC

DAC

DAC

REV. A

a

Single-Supply

16-Bit - Stereo ADC

FEATURES

Single 5 V Power Supply

Single-Ended Dual-Channel Analog Inputs

92 dB (Typ) Dynamic Range

90 dB (Typ) S/(THD + N)

0.006 dB Decimator Pass-Band Ripple

Fourth Order, 64

Oversampling

-

Modulator

Three-Stage, Linear-Phase Decimator

256

Less than 100

W (Typ) Power-Down Mode

Input Overrange Indication

On-Chip Voltage Reference

Flexible Serial Output Interface

28-Lead SOIC Package

APPLICATIONS

Consumer Digital Audio Receivers

Digital Audio Recorders, Including Portables

CD-R, DCC, MD, and DAT

Multimedia and Consumer Electronics Equipment

Sampling Music Synthesizers

AD1870

shapes the one-bit comparator’s quantization noise out of the

audio pass band. The high order of the modulator randomizes the

modulator output, reducing idle tones in the AD1870 to very

low levels. Because its modulator is single bit, the AD1870 is

inherently monotonic and has no mechanism for producing

differential linearity errors.

The input section of the AD1870 uses autocalibration to correct

any dc offset voltage present in the circuit, provided that the inputs

are ac-coupled. The single-ended dc input voltage can swing

between 0.7 V and 3.8 V typically. The AD1870 antialias input

circuit requires four external 470 pF NPO ceramic chip filter

capacitors, two for each channel. No active electronics are needed.

Decoupling capacitors for the supply and reference pins are

also required.

The dual-digital decimation filters are triple-stage, finite impulse

response filters for effectively removing the modulator’s high

frequency quantization noise and reducing the 64

and a narrow transition band that properly digitizes 20 kHz signals

at a 44.1 kHz sampling frequency. Pass-band ripple is less than

0.006 dB, and stop-band attenuation exceeds 90 dB.

(Continued on Page 7)

Information furnished by Analog Devices is believed to be accurate and

reliable. However, no responsibility is assumed by Analog Devices for its

use, nor for any infringements of patents or other rights of third parties that

may result from its use. No license is granted by implication or otherwise

under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781/329-4700

www.analog.com

Fax: 781/326-8703

© Analog Devices, Inc., 2002

PRODUCT OVERVIEW

The AD1870 is a stereo, 16-bit oversampling ADC based on

sigma-delta ( - ) technology intended primarily for digital

audio bandwidth applications requiring a single 5 V power supply.

Each single-ended channel consists of a fourth order one-bit

noise shaping modulator and a digital decimation filter. An on-chip

voltage reference, stable over temperature and time, defines the

full-scale range for both channels. Digital output data from both

channels are time multiplexed to a single, flexible serial inter-

face. The AD1870 accepts a 256

Master and Slave Modes. In Slave Mode, all clocks must be ex-

ternally derived from a common source.

Input signals are sampled at 64

switched capacitors, eliminating external sample-and-hold ampli-

fiers and minimizing the requirements for antialias filtering at the

input. With simplified antialiasing, linear phase can be preserved

across the pass band. The on-chip single-ended-to-differential sig-

nal converters save the board designer from having to provide

them externally. The AD1870’s internal differential architecture

provides increased dynamic range and excellent power supply

rejection characteristics. The AD1870’s proprietary fourth order

differential switched-capacitor

-

modulator architecture