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AD5531 Folha de dados(PDF) 1 Page - Analog Devices

Nome de Peças AD5531
Descrição Electrónicos  Serial Input, Voltage Output 12-/14-Bit Digital-to-Analog Converters
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Página de início  http://www.analog.com
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AD5531 Folha de dados(HTML) 1 Page - Analog Devices

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Serial Input, Voltage Output
12-/14-Bit Digital-to-Analog Converters
AD5530/AD5531
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringements of patents or other
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2007 Analog Devices, Inc. All rights reserved.
FEATURES
Pin-compatible 12-, 14-bit digital-to-analog converters
Serial input, voltage output
Maximum output voltage range of ±10 V
Data readback
3-wire serial interface
Clear function to a user-defined voltage
Power-down function
Serial data output for daisy-chaining
16-lead TSSOP
APPLICATIONS
Industrial automation
Automatic test equipment
Process control
General-purpose instrumentation
FUNCTIONAL BLOCK DIAGRAM
LDAC
RBEN
REFAGND
SDIN
POWER-DOWN
CONTROL LOGIC
DAC REGISTER
REFIN
12-/14-BIT
DAC
R
R
GND
SCLK
SYNC
SDO
R
R
VOUT
DUTGND
VDD
VSS
SHIFT REGISTER
AD5530/AD5531
CLR
PD
Figure 1.
GENERAL DESCRIPTION
The AD5530/AD5531 are single 12- and 14-bit (respectively)
serial input, voltage output digital-to-analog converters (DAC).
They utilize a versatile 3-wire interface that is compatible with
SPI®, QSPI™, MICROWIRE™, and DSP interface standards. Data
is presented to the part in a 16-bit serial word format. Serial
data is available on the SDO pin for daisy-chaining purposes.
Data readback allows the user to read the contents of the DAC
register via the SDO pin.
The DAC output is buffered by a gain of two amplifier and
referenced to the potential at DUTGND. LDAC can be used to
update the output of the DAC asynchronously. A power-down
pin (PD) allows the DAC to be put into a low power state, and
a CLR pin allows the output to be cleared to a user-defined
voltage, the potential at DUTGND.
The AD5530/AD5531 are available in 16-lead TSSOP.


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