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CD4027 Folha de dados(PDF) 8 Page - Intersil Corporation |
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CD4027 Folha de dados(HTML) 8 Page - Intersil Corporation |
8 / 8 page 787 All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com CD4027BMS Chip Dimensions and Pad Layout FIGURE 7. TYPICAL PROPAGATION DELAY TIME vs LOAD CAPACITANCE (SET TO Q, OR RESET TO Q) FIGURE 8. TYPICAL MAXIMUM CLOCK FREQUENCY vs SUPPLY VOLTAGE (TOGGLE MODE) Typical Performance Characteristics (Continued) AMBIENT TEMPERATURE (TA) = +25 oC LOAD CAPACITANCE (CL) (pF) 40 60 80 100 20 SUPPLY VOLTAGE (VDD) = 5V 15V 10V 250 0 200 150 100 50 AMBIENT TEMPERATURE (TA) = +25 oC trl tf = 5ns CL = 50pF 30 25 20 15 10 5 0 5 10 15 20 SUPPLY VOLTAGE (VDD) (V) Dimensions in parentheses are in millimeters and are derived from the basic inch dimensions as indicated. Grid graduations are in mils (10-3 inch) METALLIZATION: Thickness: 11k Å − 14kÅ, AL. PASSIVATION: 10.4kÅ - 15.6k Å, Silane BOND PADS: 0.004 inches X 0.004 inches MIN DIE THICKNESS: 0.0198 inches - 0.0218 inches |
Nº de peça semelhante - CD4027 |
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Descrição semelhante - CD4027 |
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