Data Sheet S15818EJ1V0DS

4

µµµµPD16705

3. PIN FUNCTIONS

Pin Symbol

Pin Name

I/O

Description

Driver output

O

These pins output scan signals that drive the vertical direction (gate lines) of a

TFT-LCD. The output signals changes in synchronization with the rising edge of

R,/L

Shift direction select

input

I

The shift direction control pin of shift resister.

R,/L = H (right shift): STVR

R,/L = L or Open (left shift): STVL

STVR,

STVL

Start pulse

input/output

I/O

This is the input of the internal shift register. The start pulse is read at the rising

edge of shift clock CLK, and scan signals are output from the driver output pins.

output at the falling edge of the 263rd clock of shift clock CLK, and is cleared at

CLK

Shift clock input

I

This pin inputs a shift clock to the internal shift register. The shift operation is

performed in synchronization with the rising edge of this input.

Output enable input

I

register is not cleared. CLK is asynchronous in the clock. Note that the output

terminal, which can be controlled by the enable signal changes, refers to 4.

RELATIONS OF ENABLE INPUT AND OUTPUT TERMINAL.

/AO

All-on control

I

MODE

Selection of number of

outputs

Logic power supply

-

2.3 to 3.6 V

Driver positive power

supply

-

15 to 25 V. The driver output: high level

Logic ground

-

Connect this pin to the ground of the system.

Negative power

supply for internal

operation

-

–15 to –5 V. The driver output: low level

power in the reverse order. These power up/down sequence must be observed also during

transition period.

2. Insert a capacitor of about 0.1

µµµµF between each power line, as shown below, to secure noise

0.1

F

µ

0.1

F

µ

0.1

F

µ