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PD16780 Folha de dados(PDF) 6 Page - Renesas Technology Corp

Nome de Peças PD16780
Descrição Electrónicos  288/300 OUTPUT TFT-LCD SOURCE DRIVER
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Fabricante Electrônico  RENESAS [Renesas Technology Corp]
Página de início  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

PD16780 Folha de dados(HTML) 6 Page - Renesas Technology Corp

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Data Sheet S12608EJ1V0DS00
4
µµµµ PD16780
4. PIN FUNCTIONS
Pin Symbol
Pin Name
Description
C1,C2,C3
Video signal input
These pins are input video signals R,G, and B.
S1-S300
Video signal input
These pins are output video signals, which have been sampled and hold.
C1: S3n-2 (n = 1, 2, ··········96/100)
C2: S3n-1
C3: S3n
STHR,
STHL
Cascade I/O
These pins are inputs/outputs for the start pulse for sample and hold timing.
High level of STHR/STHL is read at rising edge of CLK and start sampling video signal.
STHR serves as the input pin and STHL serves as output pin for the right shift. For left
shift, STHL serves as the input pins and STHR serves as the output pin.
R,/L
Shift direction switching
input
The shift directions of the shift registers are as follows.
R,/L = H: STHR input, S1
→ S300, STHL output.
R,/L = L: STHL input, S300
→ S1, STHR output.
Osel
Selection of Number of
outputs switching input
Selects number of outputs.
Osel = L: 288 output mode
Osel = H: 300 output mode
Output pins S145 through S156 are invalid in 288 output mode.
The signal which is with S157 to S168 (R,/L = H) or S133 to S144 (R,/L = L) is output
identically.
CLK
Shift clock input
The start pulse is read at rising edge of CLK. The sampling pulse SHPn is generated
at rising edge of CLK.
µ PD16780 corresponds only to LCD of Stripe array color filter and only simultaneous
sampling. For details, refer to 6. TIMING CHART.
CX
Hold capacitance control
input
Two Sample & hold circuits are switched.
CX = H S&H1: Sampling, S&H2: Output
CX = L S&H1: Output, S&H2: Sampling
TEST
Test pin
Fix this pin to the L level.
VDD1
Logic power supply
3.3 V
± 0.3 V, or 5.0 V ± 0.5 V
VDD2
Driver power supply
5.0 V
± 0.5 V
VSS1
Logic ground
Grounding
VSS2
Driver ground
Grounding
VSS3
Sample & hold ground
It is ground of Sample & hold capacitance. Supply this terminal with the stable GND.


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