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SM3-8RG5 Folha de dados(PDF) 2 Page - Connor-Winfield Corporation |
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SM3-8RG5 Folha de dados(HTML) 2 Page - Connor-Winfield Corporation |
2 / 32 page SM3-8RG5 Data Sheet #: TM088 Page 2 of 32 Rev: 07 Date: 09/06/11 © Copyright 2011 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice General Description TheSM3-8RG5timingmoduleprovidesaclockoutputthatmeetsorexceedsStratum3specificationsgiveninGR-1244-CORE (Issue2),GR-253-CORE(Issue3)andITU-TG.812(option3).TheSM3-8RG5featureseightreferenceinputs.Eachinputwillauto- detectthefollowingreferencefrequencies:8kHz,1.544MHz,2.048MHz,12.96MHz,19.44MHz,25.92MHz,38.88MHz,51.84MHz and77.76MHz. TheSM3-8RG5timingmodulecanbeconfiguredduringproductiontoproduceanoutputupto77.76MHz.Thisoutputisderivedfrom anonboardVCXOandmustbespecifiedwhenordering.ThesecondoutputisaBITSoutputselectableforeither1.544or2.048MHz. Themaster/slaveoutputis8KHz.TheusercommunicateswiththeSM3-8RG5modulethroughaSPIport.TheusercontrolstheSM3- 8RG5operationbywritingtotheappropriateregisters.TheusercanalsoenableordisableSPIoperationthroughaSPI_Enablepin. TheSM3-8RG5offersawiderangeofoptionsforthesystemdesigner.ThebandwidthisSPIPort-selectablefrom0.025Hzto1.6 Hz.0.098HzistherecommendedoperationalbandwidthforStratum3applications.The8kHzoutputhasanadjustablepulsewidth. Thepull-inrangeisalsoadjustabletoestablishthedesiredreferencefrequencyrejectionlimits.AFreeRunfrequencycalibration valuecanbewrittentothemoduletoprovideahighdegreeofaccuracyinthefreerunmode.Thereferencefrequencyforanygiven referenceinputisautomaticallydetected.AwealthofstatusinformationisavailablethroughtheSPIPortregisters.Theuseralsohas achoicebetweenautonomousorfullmanualcontroloperation. Inmanualmode,theusercontrolsthemoduleoperatingmodesFreeRun,HoldOverorlockedtoaspecificreference.Ifthe chosenreferenceisunavailableordisqualifiedthemoduleautomaticallyentersHoldOver. Inautonomouscontrolmode,operationalmodeselectionoccursautomaticallybasedonreferencepriorityandqualificationstatus. Whentheactivereferencebecomesdisqualified,themodulewillswitchtoanotherqualifiedreference.Ifnoneisavailable,itwillswitch toHoldOver.Intherevertivemodethemodulewillseektoacquirethehighestpriorityqualifiedreference.Inthenon-revertivemode themodulewillnotreturntothepreviousreferenceevenafteritisre-qualifiedunlesstherearenootherqualifiedreferences. Switchingbetweenreferencesishitless.Likewise,theoutputfrequencyslewrateisminimizedduringanychangeofoperating mode,includingentryintoandreturnfromFreeRunorHoldOvertoprotecttrafficfromtransient-inducedbiterrors. ReferenceStatusinformationandtheoperatingmodeinformationisaccessedthroughstatusregisters.Themodulewillsetthe Interruptpin(SPI_INT)lowtoindicateastatuschange. FreeRunoperationguaranteesanoutputwithin4.6ppmofnominalfrequencyandHoldOveroperationguaranteestheoutput frequencywillnotchangebymorethan0.37ppmduringthefirst24hours.Frequencyaccuracyisbasedonaprecisionovento providethestabiltyrequiredforStratum3compliance. TheSM3-8RG5canbeprogrammedtostartupinanymodeorbandwidth.Themodulemayevenbeprogrammedtooperateinan afullyautonomousmodewithnofurtherconfigurationrequired. Themoduleoperateson3.3V±5%withatypicalpowerdrainoflessthan1.6Watturnon,droppingtoapproximately1W@room temperatureafterwarmingup.Themoduleoperatesoverthe0°to70°Ccommercialtemperaturerange. PhasebuildoutcanbeenabledordisabledbymeansoftheSPIport. Functional Block Diagram Figure 1 Reference Input Monitor Control Mode Reference Selection DPLL APLL Reference Priority, Revertivity and Mask Table Bus Interface EEPROM DAC OCXO VCXO TRST TCK TDO TDI TMS M/S REF Ref 1 - 8 Reset MASTER SELECT T1/E1 SPI_ENBL SPI_Clk SPI_In SPI_Out SPI_INT 8 Output 1 M/S_OUT BITS_Clk LOS LOL Hold_Good |
Nº de peça semelhante - SM3-8RG5 |
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Descrição semelhante - SM3-8RG5 |
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