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ML2713CH Folha de dados(PDF) 8 Page - Micro Linear Corporation

Nome de Peças ML2713CH
Descrição Electrónicos  ML2713 Radio IF Transceiver
Download  18 Pages
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Fabricante Electrônico  MICRO-LINEAR [Micro Linear Corporation]
Página de início  http://www.microlinear.com
Logo MICRO-LINEAR - Micro Linear Corporation

ML2713CH Folha de dados(HTML) 8 Page - Micro Linear Corporation

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ML2713
8
January, 2000
PRELIMINARY DATASHEET
PRELIMINARY
OPERATIONAL MODES
MODE CONTROL
The ML2713 has four modes of operation; 1) Filer Align,
2) Transmit, 3) Receive, and 4) Sleep. The operating
modes of the ML2713 are programmed through the
parallel interface made up of pins RS, TS, and LOE. These
pins dynamically control the mode, and will enable the
appropriate circuitry within 1msec of transitioning low.
These control pins have on chip pull ups to VCC1, and are
CMOS compatible. The relationship between the
operating modes and control pins is shown in Table 1.
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Table 1. Mode Control Logic
FILTER ALIGN MODE
The ML2713 has three filters; the 2IF, discriminator, and
data. Part of each filter is off chip, made up of external
components, and part is on chip. The 2IF and
discriminator filters have external inductors and
capacitors configured to give a bandpass characteristic.
In the Filter Align mode the ML2713 will adjust an on
chip capacitor array that is in parallel with the external
capacitance to correct for any tolerances in the external
components values, thereby centering the bandpass filters
to the correct frequency. In this way any production
trimming of the filters is eliminated. The data filter is
made up of on chip op-amps and off chip resistors and
capacitors and does not need to be aligned or trimmed.
The Filter Align mode can be disabled by tying MS1 to
VCC4.
In the Filter Align mode the ML2712 provides an 8MHz
signal to the 2LO port, pins 2LO and 2LOB, of the
ML2713. The 2LO port is a low impedance common
base stage such that the 2LO signal is not attenuated by
the parasitic capacitance of the ML2712, ML2713, the
interconnect between them, and their packages. The 2LO
port then drives the 2IF filter, and a frequency divider. The
frequency divider divides the 8MHz signal down to a
500kHz which then clocks a 7-bit up/down counter. The
2IF filter will remove the fundamental of this signal, and
pass the third harmonic at 24Mhz through a 0/90 degree
phase splitter to the limiters which in turn drive the
discriminator. The output of the discriminator connects to
a low pass filter, which then drives a comparator. This
comparator looks to see if the discriminator output is
greater than or less than zero volts differential. If the
discriminator filter bandpass characteristic is centered
properly on 24MHz, then the 24MHz input to the
discriminator should result in a zero signal at the
discriminator output. If the center frequency is too high,
the discriminator output will go high. If the center
frequency is too low, the discriminator output will go low.
A high or a low here will signal the up/down counter to
increment or decrement respectively. The up/down
counter then drives three identical variable capacitor
arrays, leading to changes in on chip capacitors. Two of
these on chip capacitors are in parallel with off chip
capacitors in the 2IF filter, and one is in parallel with the
off chip capacitor in the discriminator filter. These will
cancel any tolerance associated with the off chip
components such that the center frequencies of both
filters are properly centered. The 7 bit up/down counter
begins at mid code of 128 levels, so there will be a
maximum of 64 counts in either direction. Since the up/
down counter is clocked at the 500kHz frequency, the
filters will align within 128
msec. Therefore, in a WLAN
system, the filters can be re-aligned every time the radio
hops to a new frequency because it can do so in less time
than it takes for the PLLs to settle. When switching from
Filter Align mode, the up/down counter freezes, keeping
the 7-bit result of the alignment fixed. Whenever the
ML2713 is put in the Sleep mode, the up/down counter
resets to the mid point. Therefore, if the Filter Align is
being used, the filters must be realigned prior to receiving
or transmitting.
Active circuits in Filter Align Mode are shown in Figure
1.


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