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ML4818 Folha de dados(PDF) 8 Page - Micro Linear Corporation |
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ML4818 Folha de dados(HTML) 8 Page - Micro Linear Corporation |
8 / 12 page 8 ML4818 Figure 10. Over-Current, Soft-Start, and Integrating Fault Detect Circuits. CRST + – RRST 12 + – 9 4 INHIBIT OUTPUT UNDER-VOLTAGE LOCKOUT CLOCK 3.4V 1.3V RCRESET RSENSE R1 C1 V+ I2 S Q R TERMINATE PWM CYCLE V+ I1 SOFT START ISWITCH CSS ILIM 1V 1V 3.4V V(PIN 4) V(PIN 12) 1V 3.4V V(PIN 4) V(PIN 12) Figure 11c, 11d. ILIMIT and Resulting RCRESET Waveforms During Load Surge. Figure 11a, 11b. ILIMIT and Resulting RCRESET Waveforms During Short Circuit. CURRENT LIMIT, FAULT DETECTION AND SOFT START Current limit is implemented when the current sensed on ILIM reaches the 1V limit. At this point, the PWM cycle is terminated. The flip flop (Figure 10) turns on the current source to charge CRST and remains on for the duration of the clock period. When CRST has charged to 3.4V, a soft start reset occurs. The number of times the PWM cycle is terminated due to over-current is “remembered” on CRST. Over time, CRST is discharged by RRST providing a measure of “forgetting” when the over-current condition no longer occurs. This integrating fault detection is useful in differentiation between short circuit and load surge conditions. Since the per cycle charge on RCRESET is proportional to how early in the power cycle the over-current occurs, a reset will occur more quickly under output short circuit conditions (Figures 11a and 11b) than during a load surge (Figures 11c and 11d). When the soft start reset occurs, the output is inhibited and the soft start capacitor is discharged. The output will remain off until CRST discharges to 1.3V through RRST, providing a reset delay. When the IC restarts, the error amplifier output voltage is limited to the voltage at SOFT START, thus limiting the duty cycle. |
Nº de peça semelhante - ML4818 |
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Descrição semelhante - ML4818 |
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