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LC75897PW Folha de dados(PDF) 8 Page - ON Semiconductor

Nome de Peças LC75897PW
Descrição Electrónicos  Duty General-Purpose LCD Driver
Download  35 Pages
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Fabricante Electrônico  ONSEMI [ON Semiconductor]
Página de início  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

LC75897PW Folha de dados(HTML) 8 Page - ON Semiconductor

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8
Pin Functions
Symbol
Pin No.
Function
Active
I/O
Handling
when
unused
S1/P1 to S8/P8
S9 to S128
1 to 8
9 to 128
Segment outputs for displaying the display data transferred by serial data
input. Also, by the control data, S1/P1 to S3/P3 can be used as a general-
purpose output port or PWM output port, while S4/P4 can be used as a
general-purpose output port or clock output port and S5/P5 to S8/P8 can be
used as a general-purpose output port.
-
O
OPEN
COM1 to COM3
COM4/S129
132 to 130
129
Common driver outputs. The frame frequency is fo [Hz]. The COM4/S129 pin
can be used as a segment output in 1/3 duty.
-
O
OPEN
OSC
140
Oscillator connection. An oscillator circuit is formed by connecting an
external resistor and capacitor to this pin. This pin can also be used as the
external clock input pin as controlled by control data.
-
I/O
VDD
CE
CL
DI
142
143
144
Serial data transfer inputs. These pins are connected to the control
microprocessor.
CE: Chip enable
CL: Synchronization clock
DI: Transfer data
H
-
I
I
I
GND
INH
141
Display off control input
• INH = low (VSS) ...Off
S1/P1 to S8/P8 = low (VSS)
(These pins are forcibly set to the segment output port
function and fixed at the VSS level.)
S9 to S128 = low (VSS)
COM1 to COM3 = low (VSS)
COM4/S129 = low (VSS)
OSC = "Z" (high impedance)
RC oscillation stopped
External clock input inhibited
Display contrast adjustment circuit stopped
• INH = high (VDD) ...On
RC oscillation enabled (RC oscillator operating mode)
Enables external clock input (external clock operating
mode).
Display contrast adjustment circuit enabled
Note that serial data transfers can be performed when the display is forced
off by this pin.
L
I
GND
VLCD0
135
LCD drive 3/3 bias voltage (high level) supply. This level can be modified
using the display contrast adjustment circuit. However, note that VLCD0
must be greater than or equal to 2.7V. Also, since this IC provides the built-
in display contrast adjustment circuit, applications must not attempt to
provide this level from external circuits.
-
O
OPEN
VLCD1
136
LCD drive 2/3 bias voltage (middle level) supply. It is possible to supply the
2/3VLCD0 voltage to this pin externally. This pin must be shorted to VLCD2
if 1/2 bias is used.
-
I
OPEN
VLCD2
137
LCD drive 1/3 bias voltage (middle level) supply. It is possible to supply the
1/3VLCD0 voltage to this pin externally. This pin must be shorted to VLCD1
if 1/2 bias is used.
-
I
OPEN
VDD
133
Logic block power supply. Provide a voltage in the range 2.7 to 6.0V.
-
-
-
VLCD
134
LCD driver block power supply. When VLCD0 is between 0.70VLCD and
0.95VLCD, supply a voltage in the range 4.0 to 6.0V. When VLCD0 and
VLCD will be equal, supply a voltage in the range 2.7 to 6.0V.
-
-
-
VSS
138,139
Ground pin. Connect to ground.
-
-
-


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