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SM5905AF Folha de dados(PDF) 6 Page - Nippon Precision Circuits Inc |
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SM5905AF Folha de dados(HTML) 6 Page - Nippon Precision Circuits Inc |
6 / 35 page NIPPON PRECISION CIRCUITS-6 SM5905AF Parameter Symbol Condition Rating Unit System clock Min Typ Max Clock pulsewidth (HIGH level) tCWH 26 29.5 50 ns Clock pulsewidth (LOW level) tCWL 26 29.5 50 ns Clock pulse cycle tCY 384fs 56 59 100 ns CWH t CWL t CY t 0.5VDD CLK Parameter Symbol Rating Unit Condition Min Typ Max YSCK pulsewidth (HIGH level) tBCWH 75 ns YSCK pulsewidth (LOW level) tBCWL 75 ns YSCK pulse cycle tBCY 150 ns YSRDATA setup time tDS 50 ns YSRDATA hold time tDH 50 ns Last YSCK rising edge to YLRCK edge tBL 50 ns YLRCK edge to first YSCK rising edge tLB 50 ns 0 3fs Memory system ON YLRCK pulse frequency (MSON=H) See note below. fs fs Memory system OFF (MSON=L) Note. When the memory system is OFF (through mode), the input data rate is synchronized to the system clock input (384fs), so input data needs to be at 1/384 of this frequency. But, this IC can tolerate a certain amount of jitter. For details, refer to Through-mode operation. YSCK YSRDATA YLRCK BCY t DS t DH t BCWH t BCWL t LB t BL t 0.5VDD 0.5VDD 0.5VDD Serial input (YSRDATA, YLRCK, YSCK pins) AC characteristics Standard voltage: VDD1 = VDD2 = 4.5 to 5.5 V, VSS = 0 V, Ta = - 40 to 85 ˚C (*) Typical values are for fs = 44.1 kHz System clock (CLK pin) System clock input |
Nº de peça semelhante - SM5905AF |
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Descrição semelhante - SM5905AF |
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