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ADF5355 Folha de dados(PDF) 9 Page - Analog Devices

Nome de Peças ADF5355
Descrição Electrónicos  Microwave Wideband Synthesizer with Integrated VCO
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Data Sheet
ADF5355
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Figure 3. Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
Mnemonic
Description
1
CLK
Serial Clock Input. Data is clocked into the 32-bit shift register on the CLK rising edge. This input is a high
impedance CMOS input.
2
DATA
Serial Data Input. The serial data is loaded most significant bit (MSB) first with the four least significant bits
(LSBs) as the control bits. This input is a high impedance CMOS input.
3
LE
Load Enable, CMOS Input. When LE goes high, the data stored in the shift register is loaded into the register
that is selected by the four LSBs.
4
CE
Chip Enable. A logic low on this pin powers down the device and puts the charge pump into three-state mode.
A logic high (at levels equal to DVDD) on this pin powers up the device, depending on the status of the power-
down bits.
5, 16
AVDD
Analog Power Supply. This pin ranges from 3.15 V to 3.45 V. Connect decoupling capacitors to the analog
ground plane as close to this pin as possible. AVDD must have the same value as DVDD.
6
VP
Charge Pump Power Supply. VP must have the same value as VVCO. Connect decoupling capacitors to the
ground plane as close to this pin as possible.
7
CPOUT
Charge Pump Output. When enabled, this output provides ±ICP to the external loop filter. The output of the
loop filter is connected to VTUNE to drive the internal VCO.
8
CPGND
Charge Pump Ground. This output is the ground return pin for CPOUT.
9
AGND
Analog Ground. Ground return pin for AVDD.
10
VRF
Power Supply for the RF Output. Connect decoupling capacitors to the analog ground plane as close to this
pin as possible. VRF must have the same value as AVDD.
11
RFOUTA+
VCO Output. The output level is programmable. The VCO fundamental output or a divided down version is
available. This pin can be left floating if RFOUTA is disabled in Register 6 or by the PDBRF pin.
12
RFOUTA−
Complementary VCO Output. The output level is programmable. The VCO fundamental output or a divided
down version is available. This pin can be left floating if RFOUTA is disabled in Register 6 or by the PDBRF pin.
13, 15
AGNDRF
RF Output Stage Ground. Ground return pins for the RF output stage.
14
RFOUTB
Auxiliary VCO Output. The 2× VCO output is available at this pin.
17
VVCO
Power Supply for the VCO. The voltage on this pin ranges from 4.75 V to 5.25 V. Place decoupling capacitors to
the analog ground plane as close to this pin as possible. For best performance, this supply must be clean and
have low noise.
18, 21
AGNDVCO
VCO Ground. Ground return path for the VCO.
19
VREGVCO
VCO Compensation Node. Place decoupling capacitors to the ground plane as close to this pin as possible.
Connect this pin directly to VVCO.
20
VTUNE
Control Input to the VCO. This voltage determines the output frequency and is derived from filtering the CPOUT
output voltage.
22
RSET
Bias Current Resistor. Connecting a resistor between this pin and ground sets the charge pump output current.
CLK
DATA
LE
CE
VBIAS
VREF
VP
CPOUT
CPGND
RSET
VTUNE
AGNDVCO
AGNDVCO
VVCO
NOTES
1. THE EXPOSED PAD MUST BE CONNECTED TO AGND.
VREGVCO
AVDD
24
23
22
21
20
19
18
17
1
2
3
4
5
6
7
8
ADF5355
TOP VIEW
(Not to Scale)
Rev. A | Page 9 of 38


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