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TS1003IJ5 Folha de dados(PDF) 9 Page - Silicon Laboratories |
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TS1003IJ5 Folha de dados(HTML) 9 Page - Silicon Laboratories |
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9 / 13 page  TS1003 TS1003 Rev. 1.0 Page 9 The circuit utilizes the classic two op amp instrumentation amplifier topology with four resistors to set the gain. The equation is simply that of a noninverting amplifier as shown in the figure. The two resistors labeled R1 should be closely matched to each other as well as both resistors labeled R2 to ensure acceptable common-mode rejection performance. Resistor networks ensure the closest matching as well as matched drifts for good temperature stability. Capacitor C1 is included to limit the bandwidth and, therefore, the noise in sensitive applications. The value of this capacitor should be adjusted depending on the desired closed-loop bandwidth of the instrumentation amplifier. The RC combination creates a pole at a frequency equal to 1/(2π×R1C1). If the AC-CMRR is critical, then a matched capacitor to C1 should be included across the second resistor labeled R1. Because the TS1003 accepts rail-to-rail inputs, the input common mode range includes both ground and the positive supply of 1.5V. Furthermore, the rail-to-rail output range ensures the widest signal range possible and maximizes the dynamic range of the system. Also, with its low supply current of 0.6μA, this circuit consumes a quiescent current of only ~1.3μA, yet it still exhibits a 1-kHz bandwidth at a circuit gain of 2. Driving Capacitive Loads While the TS1003’s internal gain-bandwidth product is 4kHz, it is capable of driving capacitive loads up to 50pF in voltage follower configurations without any additional components. In many applications, however, an operational amplifier is required to drive much larger capacitive loads. The amplifier’s output impedance and a large capacitive load create additional phase lag that further reduces the amplifier’s phase margin. If enough phase delay is introduced, the amplifier’s phase margin is reduced. The effect is quite evident when the transient response is observed as there will appear noticeable peaking/ringing in the output transient response. If the TS1003 is used in an application that requires driving larger capacitive loads, an isolation resistor between the output and the capacitive load should be used as illustrated in Figure 5. Table 1 illustrates a range of RISO values as a function of the external CLOAD on the output of the TS1003. The power supply voltage used on the TS1003 at which these resistor values were determined empirically was 1.8V. The oscilloscope capture shown in Figure 6 illustrates a typical transient response obtained with a CLOAD = 100pF and an RISO = 120kΩ. Note that as CLOAD is increased a smaller RISO is needed for optimal transient response. In the event that an external RLOAD in parallel with CLOAD appears in the application, the use of an RISO results in gain accuracy loss because the external series RISO forms a voltage-divider with the external load resistor RLOAD. External Capacitive Load, CLOAD External Output Isolation Resistor, RISO 0-50pF Not Required 100pF 120kΩ 500pF 50kΩ 1nF 33kΩ 5nF 18kΩ 10nF 13kΩ Figure 5: Using an External Resistor to Isolate a CLOAD from the TS1003’s Output VIN VOUT |
Nº de peça semelhante - TS1003IJ5 |
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Descrição semelhante - TS1003IJ5 |
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