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TS1004IT14 Folha de dados(PDF) 11 Page - Silicon Laboratories |
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TS1004IT14 Folha de dados(HTML) 11 Page - Silicon Laboratories |
11 / 14 page TS1002/TS1004 TS1002/4 Rev. 1.0 Page 11 Printed Circuit Board Layout Considerations Even though these amplifiers operate from a single 0.65V to 2.5V power supply and consume very little supply current, it is always good engineering practice to bypass the power supplies pins with a 0.1 μF ceramic capacitor placed in close proximity to the VDD and VSS (or GND) pins. Good pcb layout techniques and analog ground plane management improve the performance of any analog circuit by decreasing the amount of stray capacitance that could be introduced at the op amp's inputs and outputs. Excess stray capacitance can easily couple noise into the input leads of the op amp and excess stray capacitance at the output will add to any external capacitive load. Therefore, PC board trace lengths and external component leads should be kept a short as practical to any of the amplifiers’ package pins. Second, it is also good engineering practice to route/remove any analog ground plane from the inputs and the output pins of these amplifiers. |
Nº de peça semelhante - TS1004IT14 |
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Descrição semelhante - TS1004IT14 |
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