54AC11030, 74AC11030

8INPUT POSITIVENAND GATES

SCAS001A − JUNE 1987 − REVISED APRIL 1993

POST OFFICE BOX 655303

POST OFFICE BOX 1443

Copyright

2−1

PCB Layout

Minimize High-Speed Switching Noise

CMOS) 1-

µm Process

at 125

°C

Small-Outline Packages, Ceramic Chip

Carriers, and Standard Plastic and Ceramic

300-mil DIPs

description

These devices contain a single 8-input NAND gate

and perform the following Boolean functions in

positive logic:

Y = A

• B • C • D • E • F • G • H or

Y = A + B + C + D + E + F + G + H

The 54AC11030 is characterized for operation

over the full military temperature range of − 55

°C

to 125

°C. The 74AC11030 is characterized for

operation from − 40

°C to 85°C.

FUNCTION TABLE

INPUTS

A THRU H

OUTPUT

Y

All inputs H

L

One or more inputs L

H

logic diagram (positive logic)

&

3

A

2

B

1

C

14

D

13

E

12

F

9

G

8

H

Y

5

Y

5

3

A

2

B

1

C

14

D

13

E

12

F

9

G

8

H

† This symbol is in accordance with ANSI/IEEE Std 91-1984

and IEC Publication 617-12.

Pin numbers shown are for the D, J, and N packages.

54AC11030 ...J PACKAGE

74AC11030 ...D OR N PACKAGE

(TOP VIEW)

54AC11030 . . . FK PACKAGE

(TOP VIEW)

NC − No internal connection

1

2

3

4

5

6

7

14

13

12

11

10

9

8

C

B

A

GND

Y

NC

NC

D

E

F

NC

G

H

3

2

1 20 19

910 11 12 13

4

5

6

7

8

18

17

16

15

14

G

NC

H

NC

NC

D

NC

C

NC

B

EPIC is a trademark of Texas Instruments Incorporated.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.