MC10E016, MC100E016

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9

APPLICATIONS INFORMATION (continued)

E016

MSB

CLK

TC

PE

CE

E016

CLK

TC

PE

CE

E016

CLK

TC

PE

CE

EL01

EL01

EL01

CLOCK

Q0 -> Q7

PO -> P7

Q0 -> Q7

PO -> P7

Q0 -> Q7

PO -> P7

Q0 -> Q7

PO -> P7

LO

E016

LSB

CLK

TC

PE

CE

Figure 6. 32-Bit Cascaded E016 Programmable Divider

OUT

Figure 6 shows a typical block diagram of a 32-bit divider

chain. Once again to maximize the frequency of operation

EL01 OR gates were used. For lower frequency applications

a slower OR gate could replace the EL01. Note that for a

16-bit divider the OR function feeding the PE (program

enable) input CANNOT be replaced by a wire OR tie as the

TC output of the least significant E016 must also feed the CE

input of the most significant E016. If the two TC outputs

were OR tied the cascaded count operation would not

operate properly. Because in the cascaded form the PE

feedback is external and requires external gating, the

maximum frequency of operation will be significantly less

than the same operation in a single device.

Maximizing E016 Count Frequency

The E016 device produces 9 fast transitioning

significant in situations where all of the outputs switch

negatively impact the maximum frequency of operation of

the device. Since the device does not need to have the Q

outputs terminated to count properly, it is recommended that

if the outputs are not going to be used in the rest of the system

they should be left unterminated. In addition, if only a subset

of the Q outputs are used in the system only those outputs

should be terminated. Not terminating the unused outputs

save in total system power dissipation. Following these

guidelines will allow designers to either be more aggressive

in their designs or provide them with an extra margin to the

published data book specifications.

Figure 7. Typical Termination for Output Driver and Device Evaluation

(See Application Note AND8020/D − Termination of ECL Logic Devices)

Driver

Device

Receiver

Device

QD

Q

D

50 W

50 W