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MC10EL51 Folha de dados(PDF) 5 Page - ON Semiconductor

Nome de Peças MC10EL51
Descrição Electrónicos  5V ECL Differential Clock D Flip?륡lop
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Fabricante Electrônico  ONSEMI [ON Semiconductor]
Página de início  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

MC10EL51 Folha de dados(HTML) 5 Page - ON Semiconductor

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MC10EL51, MC100EL51
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Table 8. AC CHARACTERISTICS (VCC= 5.0 V; VEE= 0.0 V or VCC= 0.0 V; VEE= −5.0 V (Note 1))
−40°C
25°C
85°C
Symbol
Characteristic
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
fmax
Maximum Toggle Frequency
1.8
2.8
2.2
2.8
2.2
2.8
GHz
tPLH
tPHL
Propagation Delay to Output
CLK
R
325
305
465
455
605
605
385
355
475
465
565
565
440
410
530
510
620
620
ps
tS
Setup Time
150
0
150
0
150
0
ps
tH
Hold Time
250
100
250
100
250
100
ps
tRR
Reset Recovery
400
200
400
200
400
200
ps
tPW
Minimum Pulse Width
CLK, Reset
400
400
400
ps
VPP
Input Swing (Note 2)
150
1000
150
1000
150
1000
mV
tJITTER
Cycle-to-Cycle Jitter
TBD
TBD
TBD
ps
tr
tf
Output Rise/Fall Times Q
(20% − 80%)
100
225
350
100
225
350
100
225
350
ps
1. 10 Series: VEE can vary +0.25 V / −0.5 V.
100 Series: VEE can vary +0.8 V / −0.5 V.
2. VPP(min) is minimum input swing for which AC parameters guaranteed. The device has a DC gain of ≈40.
Figure 2. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D − Termination of ECL Logic Devices.)
Driver
Device
Receiver
Device
QD
Q
D
Zo = 50 W
Zo = 50 W
50 W
50 W
VTT
VTT = VCC − 2.0 V
Resource Reference of Application Notes
AN1405/D
− ECL Clock Distribution Techniques
AN1406/D
− Designing with PECL (ECL at +5.0 V)
AN1503/D
− ECLinPSt I/O SPiCE Modeling Kit
AN1504/D
− Metastability and the ECLinPS Family
AN1568/D
− Interfacing Between LVDS and ECL
AN1672/D
− The ECL Translator Guide
AND8001/D − Odd Number Counters Design
AND8002/D − Marking and Date Codes
AND8020/D − Termination of ECL Logic Devices
AND8066/D − Interfacing with ECLinPS
AND8090/D − AC Characteristics of ECL Devices


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