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MC100LVEL16DTR2G Folha de dados(PDF) 2 Page - ON Semiconductor |
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MC100LVEL16DTR2G Folha de dados(HTML) 2 Page - ON Semiconductor |
2 / 9 page MC100LVEL16 www.onsemi.com 2 Figure 1. Logic Diagram and Pinout Assignment D, D ECL Data Inputs Q, Q ECL Data Outputs VBB Reference Voltage Output VCC Positive Supply VEE Negative Supply NC No Connect Table 1. PIN DESCRIPTION PIN FUNCTION 1 2 3 45 6 7 8 Q VEE VCC D Q D VBB NC EP (DFN8 only) Thermal exposed pad must be connected to a sufficient thermal conduit. Electrically connect to the most negative supply (GND) or leave unconnected, floating open. Table 2. ATTRIBUTES Characteristics Value Internal Input Pulldown Resistor 75 k W Internal Input Pullup Resistor 75 k W ESD Protection Human Body Model Machine Model Charged Device Model > 4 KV > 400 V > 2 kV Moisture Sensitivity, Indefinite Time out of Drypack, Pb−Free Packages (Note 1) SOIC−8 TSSOP−8 DFN8 Level 1 Level 3 Level 1 Flammability Rating Oxygen Index: 28 to 34 UL 94 V−0 @ 0.125 in Transistor Count 79 Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. Refer to Application Note AND8003/D for additional information. |
Nº de peça semelhante - MC100LVEL16DTR2G |
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Descrição semelhante - MC100LVEL16DTR2G |
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