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ST16C454CJ68 Folha de dados(PDF) 4 Page - Exar Corporation

Nome de Peças ST16C454CJ68
Descrição Electrónicos  QUAD UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER (UART)
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Fabricante Electrônico  EXAR [Exar Corporation]
Página de início  http://www.exar.com
Logo EXAR - Exar Corporation

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ST16C454/68C454
4
Rev. 3.20
16/-68
31
I
16/68 Interface Type Select (input with internal pull-up). - This
input provides the 16 (Intel) or 68 (Motorola) bus interface type
select. The functions of -IOR, -IOW, INT A-D, and -CS A-D are re-
assigned with the logical state of this pin. When this pin is a logic
1, the 16 mode interface ST16C454 is selected. When this pin is
a logic 0, the 68 mode interface (ST68C454) is selected. When this
pin is a logic 0, -IOW is re-assigned to R/-W, RESET is re-assigned
to -RESET, -IOR is not used, and INT A-D(s) are connected in a
WIRE-OR” configuration. The WIRE-OR outputs are connected
internally to the open source IRQ signal output.
A0
34
I
Address-0 Select Bit. Internal registers address selection in 16 and
68 modes.
A1
33
I
Address-1 Select Bit. Internal registers address selection in 16 and
68 modes.
A2
32
I
Address-2 Select Bit. - Internal registers address selection in 16
and 68 modes.
A3-A4
20,50
I
Address 3-4 Select Bits. - When the 68 mode is selected, these
pins are used to address or select individual UART’s (providing -
CS is a logic 0). In the 16 mode, these pins are reassigned as chip
selects, see -CSB and -CSC.
-CS
16
I
Chip Select. (active low) - In the 68 mode, this pin functions as a
multiple channel chip enable. In this case, all four UART’s (A-D)
are enabled when the -CS pin is a logic 0. An individual UART
channel is selected by the data contents of address bits A3-A4.
When the 16 mode is selected, this pin functions as -CSA, see
definition under -CS A-B.
-CS A-B
16,20
-CS C-D
50,54
I
Chip Select A, B, C, D (active low) - This function is associated with
the 16 mode only, and for individual channels, “A” through “D.”
When in 16 Mode, these pins enable data transfers between the
user CPU and the ST16C454 for the channel(s) addressed.
Individual UART sections (A, B, C, D) are addressed by providing
a logic 0 on the respective -CS A-D pin. When the 68 mode is
selected, the functions of these pins are reassigned. 68 mode
functions are described under the their respective name/pin
headings.
Symbol
Pin
Signal
Pin Description
type
SYMBOL DESCRIPTION


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