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AD9215BCP-105EB Folha de dados(PDF) 7 Page - Analog Devices |
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AD9215BCP-105EB Folha de dados(HTML) 7 Page - Analog Devices |
7 / 36 page AD9215 Rev. A | Page 7 of 36 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 OR MODE SENSE VREF REFB REFT AVDD AGND VIN+ VIN– AGND AVDD CLK PDWN D9 (MSB) D8 D7 D6 DRVDD DRGND D5 D4 D3 D2 D1 D0 (LSB) DNC 28 27 26 25 24 23 22 21 20 19 18 17 16 15 AD9215 TOP VIEW (Not to Scale) DNC = DO NOT CONNECT DNC Figure 3. TSSOP (RU-28) DNC 1 CLK 2 DNC 3 PDWN 4 DNC 5 DNC 6 DNC 7 DNC 8 DNC = DO NOT CONNECT 24 VREF 23 SENSE 22 MODE 21 OR 20 D9 (MSB) 19 D8 18 D7 17 D6 AD9215 TOP VIEW (Not to Scale) Figure 4. LFCSP (CP-32) Table 6. Pin Function Descriptions TSSOP Pin No. LFCSP Pin No. Mnemonic Description 1 21 OR Out-of-Range Indicator. 2 22 MODE Data Format and Clock Duty Cycle Stabilizer (DCS) Mode Selection. 3 23 SENSE Reference Mode Selection. 4 24 VREF Voltage Reference Input/Output. 5 25 REFB Differential Reference (Negative). 6 26 REFT Differential Reference (Positive). 7, 12 27, 32 AVDD Analog Power Supply. 8, 11 28, 31 AGND Analog Ground. 9 29 VIN+ Analog Input Pin (+). 10 30 VIN− Analog Input Pin (−). 13 2 CLK Clock Input Pin. 14 4 PDWN Power-Down Function Selection (Active High). 15 to 16 1, 3, 5 to 8 DNC Do not connect, recommend floating this pin. 17 to 22, 25 to 28 9 to 14, 17 to 20 D0 (LSB) to D9 (MSB) Data Output Bits. 23 15 DRGND Digital Output Ground. 24 16 DRVDD Digital Output Driver Supply. Must be decoupled to DRGND with a minimum 0.1 µF capacitor. Recommended decoupling is 0.1 µF in parallel with 10 µF. |
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Descrição semelhante - AD9215BCP-105EB |
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