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9ZXL1251AKLFT Folha de dados(PDF) 6 Page - Integrated Device Technology |
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9ZXL1251AKLFT Folha de dados(HTML) 6 Page - Integrated Device Technology |
6 / 20 page 12-OUTPUT DB1200ZL DERIVATIVE WITH INTEGRATED 85Ω TERMINATIONS 6 REVISION B 11/20/15 9ZXL1251 DATASHEET Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the 9ZXL1251. These ratings, which are standard values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. Electrical Characteristics–DIF_IN Clock Input Parameters Electrical Characteristics–SMBus PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS NOTES Supply Voltage VDDx 4.6 V 1,2 Input Low Voltage VIL GND-0.5 V 1 Input High Voltage VIH Except for SMBus interface VDD+0.5 V 1,3 Input High Voltage VIHSMB SMBus clock and data pins 5.5 V 1 Storage Temperature Ts -65 150 °C 1 Junction Temperature Tj 125 °C 1 Input ESD protection ESD prot Human Body Model 2000 V 1 1Guaranteed by design and characterization, not 100% tested in production. 2 Operation under these conditions is neither implied nor guaranteed. 3 Not to exceed 4.6V. TAMB = TCOM or TIND, unless noted., Supply Voltages per normal operation conditions, See Test Loads for Loading Conditions PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS NOTES Input Crossover Voltage - DIF_IN VCROSS Cross Over Voltage 150 900 mV 1 Input Swing - DIF_IN VSWING Differential value 300 mV 1 Input Slew Rate - DIF_IN dv/dt Measured differentially 0.4 8 V/ns 1,2 Input Leakage Current IIN VIN = VDD , VIN = GND -5 5 uA Input Duty Cycle dtin Measurement from differential wavefrom 45 55 % 1 Input Jitter - Cycle to Cycle JDIFIn Differential Measurement 0 125 ps 1 1 Guaranteed by design and characterization, not 100% tested in production. 2Slew rate measured through +/-75mV window centered around differential zero TAMB = TCOM or TIND, unless noted., Supply Voltages per normal operation conditions, See Test Loads for Loading Conditions PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS NOTES SMBus Input Low Voltage VILSMB 0.8 V SMBus Input High Voltage VIHSMB 2.1 VDDSMB V SMBus Output Low Voltage VOLSMB @ IPULLUP 0.4 V SMBus Sink Current IPULLUP @ VOL 4mA Nominal Bus Voltage VDDSMB 2.7 3.6 V 1 SCLK/SDATA Rise Time tRSMB (Max VIL - 0.15) to (Min VIH + 0.15) 1000 ns 1 SCLK/SDATA Fall Time tFSMB (Min VIH + 0.15) to (Max VIL - 0.15) 300 ns 1 SMBus Operating Frequency fMAXSMB Maximum SMBus operating frequency 400 kHz 5 1Guaranteed by design and characterization, not 100% tested in production. 2Control input must be monotonic from 20% to 80% of input swing. 5The differential input clock must be running for the SMBus to be active 3Time from deassertion until outputs are >200 mV 4DIF_IN input |
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