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8V97053L Folha de dados(PDF) 7 Page - Integrated Device Technology

Nome de Peças 8V97053L
Descrição Electrónicos  Low Power Wideband Fractional RF Synthesizer / PLL
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Fabricante Electrônico  IDT [Integrated Device Technology]
Página de início  http://www.idt.com
Logo IDT - Integrated Device Technology

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©2016 Integrated Device Technology, Inc.
August 18, 2016
8V97053L Datasheet
Pin Description and Characteristic Tables
Table 1. Pin Description1
Pin
Name
Type
Description
1
SCLK
LVCMOS Input
Pulldown
Serial Clock Input. High-Impedance CMOS input. 1.8V logic. 3.3V tolerant.
2
SDI
LVCMOS Input
Pullup
Serial Data Input. High-Impedance CMOS input. 1.8V logic. 3.3V tolerant.
3
nCS
LVCMOS Input
Pulldown
Load Enable. High-Impedance CMOS input. 1.8V logic. 3.3V tolerant. Active
Low.
4
CE
LVCMOS Input
Pullup
Chip Enable. On logic Low, powers down the device and puts the charge
pump into High-Impedance mode. Powers up the device on logic High.
5
FLSW
Analog
Fast Lock Switch. A connection should be made from the loop filter to this pin
when using the fast lock mode.
6V_CP
Power
Charge Pump Power Supply. V_CP must have the same value as VDDA. Place
decoupling capacitors to the ground plane as close to this pin as possible.
7CP_OUT
Analog
Charge Pump Output. When enabled, this output provides ±ICP to the
external loop filter. The output of the loop filter is connected to VTUNE to drive
the internal VCO.
8
GND_CP
Ground
Charge Pump Power Supply Ground.
9
GNDA
Ground
Analog Power Supply Ground.
10
VDDA
Power
Analog Supply. This pin ranges from 3.3V ± 5%. VDDA must have the same
value as VDDD.
11
GNDA_VCO
Ground
VCO Analog Power Supply Ground.
12
RF_OUTA
Output
Clock Output pair A. The output level is programmable.
13
nRF_OUTA
Output
Clock Output pair A. The output level is programmable.
14
RF_OUTB
Output
Clock Output pair B. The output level is programmable.
15
nRF_OUTB
Output
Clock Output pair B. The output level is programmable.
16
VVCO
Power
VCO Supply. This pin ranges from 3.3V ± 5%. VVCO must have the same
value as VDDA.
17
VVCO
Power
VCO Supply. This pin ranges from 3.3V ± 5%. VVCO must have the same
value as VDDA.
18
GNDA_VCO
Ground
VCO Analog Power Supply Ground.
19
VBIAS
Analog
Place decoupling capacitors (10µF) to ground, as close to this pin as possible.
20
VTUNE
Control Input to tune the VCO.
21
GNDA_VCO
Ground
VCO Analog Power Supply Ground.
22
RCP
Analog
Sets the charge pump current. Requires external resistor.
23
VCOM
Analog
Place decoupling capacitors (1µF – 10µF) to ground, as close to this pin as
possible.
24
VREF
Analog
Place decoupling capacitors (10µF) to ground, as close to this pin as possible.
25
LD
LVCMOS Output
Lock Detect. Logic High indicates PLL lock. Logic Low indicates loss of PLL
lock.
26
MUTE
LVCMOS Input
Pullup
RF_OUTA and RF_OUTB Power-Down. A logic low on this pin mutes the
RF_OUT outputs and puts them in High-Impedance.
27
GNDD
Ground
Digital Power Supply Ground.


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