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ADF4360-6BCP Folha de dados(PDF) 1 Page - Analog Devices

Nome de Peças ADF4360-6BCP
Descrição Electrónicos  Integrated Synthesizer and VCO
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Fabricante Electrônico  AD [Analog Devices]
Página de início  http://www.analog.com
Logo AD - Analog Devices

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REV. PrA 07/03
PreliminaryTechnicalData
PRELIMINARY TECHNICAL DATA
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
ADF4360-2
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 200
3
IntegratedSynthesizerandVCO
ADF4360-2 FUNCTIONAL BLOCK DIAGRAM
FEATURES
Output Frequency Range:
1800 MHz to 2150 MHz
Divide-by-2 output
+3.0 V to +3.6V Power Supply
1.8 V Logic Compatibility
Integer-N Synthesizer
Programmable Dual Modulus Prescaler
8/9, 16/17, 32/33
Programmable Output Power Level
3-Wire Serial Interface
Analog and Digital Lock Detect
Hardware and Software Power Down Mode
APPLICATIONS
Wireless Handsets (DECT, GSM, PCS, DCS, WCDMA)
Test Equipment
Wireless LANS
CATV Equipment
GENERAL DESCRIPTION
The ADF4360-2 is a fully integrated integer-N
synthesizer and voltage controlled oscillator (VCO). The
ADF4360-2 is designed for a center frequency of
2000MHz. In addition, there is a divide-by-2 option
available, whereby the user gets an RF output of between
900MHz and 1075MHz.
Control of all the on-chip registers is via a simple 3-wire
interface. The device operates with a power supply rang-
ing from 3.0V to 3.6V and can be powered down when not
in use.
PRESCALER
P/P+1
13-BIT B
COUNTER
+
-
5-BIT A
COUNTER
LOAD
LOAD
N = (BP + A)
CHARGE
PUMP
LOCK
DETECT
REFIN
14-BIT
R COUNTER
CLK
DATA
LE
24-BIT
DATA REGISTER
24-BIT
FUNCTION
LATCH
PHASE
COMPARATOR
ADF4360-2
CP
AVDD
DVDD
CE
AGND
DGND
CPGND
RSET
VTUNE
RFOUT A
INTEGER
REGISTER
VCO
CORE
÷ 2
CC
CN
MULTIPLEXER
MUXOUT
RFOUT B
VVCO
OUTPUT
STAGE
MUTE
DIVSEL = 1
DIVSEL = 2


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