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MTV118 Folha de dados(PDF) 3 Page - List of Unclassifed Manufacturers |
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MTV118 Folha de dados(HTML) 3 Page - List of Unclassifed Manufacturers |
3 / 30 page 3/15 MTV118 Revision 2.0 01/01/1999 MTV118 MYSON TECHNOLOGY 3.0 FUNCTIONAL DESCRIPTIONS 3.1 Serial Data Interface The serial data interface receives data transmitted from an external controller. There are 2 types of bus which can be accessed through the serial data interface: SPI bus and I2C bus. 3.1.1 SPI Bus When the SSB pin is pulled to a HIGH or LOW level, the SPI bus operation is selected. A valid trans- mission should start from pulling SSB to LOW level, enabling the MTV118 receiving mode and retaining the LOW level until the last cycle for a complete data packet transfer. The protocol is shown in Figure 1 on page 4. There are 3 transmission formats as shown below: Format (a) R - C - D → R - C - D → R - C - D Format (b) R - C - D → C - D → C - D → C - D Format (c) R - C - D → D → D → D → D → D R=row address, C=column address, D=display data PWM3 O - 12 Open-Drain PWM D/A Converter 3. The output pulse width is programmable by the register of row 15, column 22. PWM4 O - 13 Open-Drain PWM D/A Converter 4. The output pulse width is programmable by the register of row 15, column 23. PWM5 O - 14 Open-Drain PWM D/A Converter 5. The output pulse width is programmable by the register of row 15, column 24. PWM6 O - 15 Open-Drain PWM D/A Converter 6. The output pulse width is programmable by the register of row 15, column 25. PWM7 O - 16 Open-Drain PWM D/A Converter 7. The output pulse width is programmable by the register of row 15, column 26. VDD - 9 17 Power Supply. Positive 5 V DC supply for internal circuitry and a 0.1uF decoupling capacitor should be connected across VDD and VSS. VFLB I 10 18 Vertical Input. This pin is used to input the vertical synchronizing signal. It is triggered by lead and has an internal pull-up resistor. HTONE / PWMCK O 11 19 Half Tone Output / PWM Clock Output. This is a multiplexed pin selected by the PWMCK bit. This pin can be a PWM clock or used to attenuate R, G, B gain of VGA for the transparent windowing effect. FBKG O 12 20 Fast Blanking Output. It is used to cut off external R, G, B sig- nals of VGA while this chip is displaying characters or windows. BOUT O 13 21 Blue Color Output. This is a blue color video signal output. GOUT O 14 22 Green Color Output. This is a green color video signal output. ROUT O 15 23 Red Color Output. This is a red color video signal output. VSS - 16 24 Ground. This ground pin is used for internal circuitry. Name I/O Pin # Descriptions N16 N24 |
Nº de peça semelhante - MTV118 |
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Descrição semelhante - MTV118 |
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