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AK7755EN Folha de dados(PDF) 24 Page - Asahi Kasei Microsystems |
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AK7755EN Folha de dados(HTML) 24 Page - Asahi Kasei Microsystems |
24 / 109 page [AK7755] 014006643-E-00 2014/10 - 24 - 5. I 2C-BUS Interface (Ta= -40 to 85C; AVDD=3.0 to 3.6V, TVDD=1.7 to 3.6V, DVDD=1.14 to 1.3V, AVSS=DVSS=0V, CL=20pF) Parameter Symbol min typ max Unit I2C Timing SCL clock frequency fSCL 400 kHz Bus Free Time Between Transmissions tBUF 1.3 s Start Condition Hold Time (prior to first Clock pulse) tHD:STA 0.6 s Clock Low Time tLOW 1.3 s Clock High Time tHIGH 0.6 s Setup Time for Repeated Start Condition tSU:STA 0.6 s SDA Hold Time from SCL Falling tHD:DAT 0 0.9 s SDA Setup Time from SCL Rising tSU:DAT 0.1 s Rise Time of Both SDA and SCL Lines tR 0.3 s Fall Time of Both SDA and SCL Lines tF 0.3 s Setup Time for Stop Condition tSU:STO 0.6 s Pulse Width of Spike Noise Suppressed By Input Filter tSP 0 50 ns Capacitive load on bus Cb 400 pF tHIGH SCL SDA VIH tLOW tBUF tHD:STA tR tF tHD:DAT tSU:DAT tSU:STA Stop Start Start Stop tSU:STO VIL VIH VIL tSP Figure 14. I 2C BUS Interface Timing 6. Digital Microphone Interface (AVDD=3.0~3.6V, TVDD=1.7~3.6V, DVDD=1.14~1.3V, AVSS=DVSS=0V, Ta= -40C~85C; CL=100pF) Parameter Symbol min typ max Unit DMDAT1, DMDAT2 Serial Data Input Latch Setup Time tDMDS 50 ns Serial Data Input Latch Hold Time tDMDH 0 ns DMCLK1, DMCLK2 Clock Frequency (Note 40) fDMCK 0.5 64fs 6.2 MHz Duty Cycle dDMCK 40 50 60 % Rise Time tDMCKR 10 ns Fall Time tDMCKF 10 ns Note 40. Clock frequency is determined by the sampling rate (fs) selected by DFS[2:0] bits. |
Nº de peça semelhante - AK7755EN_16 |
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Descrição semelhante - AK7755EN_16 |
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