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IIS328DQ Folha de dados(PDF) 21 Page - STMicroelectronics |
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IIS328DQ Folha de dados(HTML) 21 Page - STMicroelectronics |
21 / 40 page DocID027250 Rev 3 21/40 IIS328DQ Digital interfaces 40 Figure 8. Multiple byte SPI read protocol (2-byte example) 5.2.2 SPI write Figure 9. SPI write protocol The SPI write command is performed with 16 clock pulses. Multiple byte write commands are performed by adding blocks of 8 clock pulses to the previous one. bit 0: WRITE bit. The value is 0. bit 1: MS bit. When 0, does not increment the address; when 1, increments the address in multiple writes. bit 2 -7: address AD(5:0). This is the address field of the indexed register. bit 8-15: data DI(7:0) (write mode). This is the data that is written to the device (MSb first). bit 16-... : data DI(...-8). Further data in multiple byte writes. Figure 10. Multiple byte SPI write protocol (2-byte example) |
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