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AD5405YCP-REEL7 Folha de dados(PDF) 5 Page - Analog Devices |
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AD5405YCP-REEL7 Folha de dados(HTML) 5 Page - Analog Devices |
5 / 24 page AD5405 Rev. 0 | Page 5 of 24 TIMING CHARACTERISTICS VDD = 2.5 V to 5.5 V, VREF = 5 V, IOUT2 = 0 V. All specifications TMIN to TMAX, unless otherwise noted. Table 2. Parameter1, 2 Limit at TMIN, TMAX Unit Conditions/Comments Write Mode t1 0 ns min R/W to CS setup time t2 0 ns min R/W to CS hold time t3 10 ns min CS low time t4 10 ns min Address setup time t5 0 ns min Address hold time t6 6 ns min Data setup time t7 0 ns min Data hold time t8 5 ns min R/W high to CS low t9 7 ns min CS min high time Data Readback Mode t10 0 ns typ Address setup time t11 0 ns typ Address hold time t12 5 ns typ Data access time 35 ns max t13 5 ns typ Bus relinquish time 10 ns max 1 See Temperature range for Y version is −40°C to +125°C. Guaranteed by design and characterization, not subject to production test. Figure 2. 2 All input signals are specified with tr = tf = 5ns (10% to 90% of VDD) and timed from a voltage level of (VIL + VIH)/2. Digital output timing measured with load circuit in . Figure 3 t7 DATA VALID t6 t2 CS R/W DATA t1 DATA VALID t2 t13 t12 t3 t8 t9 DACA/DACB t4 t5 t11 t10 Figure 2. Timing Diagram IOL 200 µA IOH 200 µA CL 50pF TO OUTPUT PIN VOH (MIN) + VOL (MAX) 2 Figure 3. Load Circuit for Data Timing Specifications |
Nº de peça semelhante - AD5405YCP-REEL7 |
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Descrição semelhante - AD5405YCP-REEL7 |
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