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S7G2 Folha de dados(PDF) 43 Page - Renesas Technology Corp

Nome de Peças S7G2
Descrição Electrónicos  32-bit ARM Cortex-M4 microcontroller
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Fabricante Electrônico  RENESAS [Renesas Technology Corp]
Página de início  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

S7G2 Folha de dados(HTML) 43 Page - Renesas Technology Corp

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R01DS0262EU0100 Rev.1.00
Page 43 of 113
Feb 23, 2016
S7G2
2. Electrical Characteristics
Note 1. Programming or erasing the flash memory is disable in Subosc-speed mode.
Note 2. See section 9, Clock Generation Circuit in User's Manual for the relationship between the ICLK, PCLKA, PCLKB,
PCLKC, PCLKD, FCLK, and BCLK frequencies.
Note 3. The ADC12 cannot be used.
2.3.2
Clock Timing
Table 2.12
Operation frequency value in Subosc-speed mode
Item
Symbol
Min
Typ
Max
Unit
Operation frequency
System clock (ICLK)*2
f
29.4
-
36.1
kHz
Peripheral module clock (PCLKA)*2
-
-
36.1
Peripheral module clock (PCLKB)*2
-
-
36.1
Peripheral module clock (PCLKC)*2,*3
-
-
36.1
Peripheral module clock (PCLKD)*2
-
-
36.1
Flash interface clock (FCLK)*1, *2
29.4
-
36.1
External bus clock (BCLK)*2
-
-
36.1
EBCLK pin output
-
-
36.1
Table 2.13
Clock timing except for sub-clock oscillator (1/2)
Item
Symbol
Min
Typ
Max
Unit
Test conditions
EBCLK pin output cycle time
tBcyc
16.6
-
-
ns
Figure 2.3
EBCLK pin output high pulse width
tCH
3.3
-
-
ns
EBCLK pin output low pulse width
tCL
3.3
-
-
ns
EBCLK pin output rise time
tCr
--
5.0
ns
EBCLK pin output fall time
tCf
--
5.0
ns
SDCLK pin output cycle time
tSDcyc
8.33
-
-
ns
SDCLK pin output high pulse width
tCH
1.0
-
-
ns
SDCLK pin output low pulse width
tCL
1.0
-
-
ns
SDCLK pin output rise time
tCr
--
3.0
ns
SDCLK pin output fall time
tCf
--
3.0
ns
EXTAL external clock input cycle time
tEXcyc
41.66
-
-
ns
Figure 2.4
EXTAL external clock input high pulse width
tEXH
15.83
-
-
ns
EXTAL external clock input low pulse width
tEXL
15.83
-
-
ns
EXTAL external clock rise time
tEXr
--
5.0
ns
EXTAL external clock fall time
tEXf
--
5.0
ns
Main clock oscillator frequency
fMAIN
8-
24
MHz
-
Main clock oscillation stabilization wait time
(crystal) *1
tMAINOSCWT
--
-*1
ms
Figure 2.5
LOCO clock oscillation frequency
fLOCO
29.4912
32.768
36.0448
kHz
-
LOCO clock oscillation stabilization wait time
tLOCOWT
-
-
60.4
μ
s
Figure 2.6
ILOCO clock oscillation frequency
fILOCO
13.5
15
16.5
kHz
-
MOCO clock oscillation frequency
FMOCO
7.2
8
8.8
MHz
-
MOCO clock oscillation stabilization wait time
tMOCOWT
-
-
15.0
μ
s-


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