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HT45R4U Folha de dados(PDF) 8 Page - Holtek Semiconductor Inc |
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HT45R4U Folha de dados(HTML) 8 Page - Holtek Semiconductor Inc |
8 / 105 page Rev. 1.10 8 �a��� 1�� �01� Rev. 1.10 9 �a��� 1�� �01� HT45R4U TinyPowerTM A/D Type e-Banking ASSP OTP MCU with LCD Pin Assignment 47 46 45 44 43 42 41 21 22 23 24 25 26 2728 29 30 31 32 33 34 35 36 37 38 39 40 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 HT 45 R4 U 64 L QF P- A PA 7/ IN T1 PA0 /B Z PA1 /B Z PA 2/ IN T0 PA 3/ PF D PA4 /T MR 2 PA5 /T MR 1 PE 1/ RE S PL CD VM AX V1 V2 C1 C2 CO M0 CO M1 SE G2 /P C2 SE G3 /P C3 SE G4 /P C4 SE G5 /P C5 SE G6 /P C6 SE G7 /P C7 SE G8 /P D0 SE G9 /P D1 SE G1 0/ PD 2 SE G1 1/ PD 3 SE G1 2/ PD 4 SE G1 3/ PD 5 SE G1 4/ PD 6 SE G1 5/ PD 7 SE G1 6 SE G1 7 Pin Description Thefollowingtabledepictsthepinscommontoalldevices. Pin/Pad Name I/O Options Description PA0/BZ PA1/BZ PA�/INT0 PA3/PFD PA4/T�R� PA�/T�R1 PA6/AN1 PA7/INT1 I/O — Bidi�e�tional 8-bit input/output po�t. Ea�� individual bit on t�is po�t �an be configured as a wake-up input by the PAWU register control bit. Software inst�u�tions dete�mine if t�e pin is a C�OS output o� S��mitt t�igge� input. A pull-�ig� �esisto� �an be �onne�ted to ea�� pin dete�mined by t�e PAPU �egiste�. PA6 is pin-s�a�ed wit� t�e A/D input pin. T�e A/D inputs a�e sele�ted via softwa�e inst�u�tions. On�e an I/O line is sele�ted as an A/D input� t�e I/O fun�tion and pull-�ig� �esisto� a�e disabled automati�ally. T�e BZ� BZ� INT0� PFD� T�R�� T�R1 and INT1 a�e pin-s�a�ed wit� PA0~PA � and PA7 �espe�tively. PB0/OSC1 PB1/OSC� PB�/AN�/T�R0 PB3/AN3~PB7/ AN7 I/O HXT o� HIRC o� EC Bidi�e�tional 8-bit input/output po�t. Softwa�e inst�u�tions dete�mine if t�e pin is a C�OS output o� S��mitt t�igge� input. A pull-�ig� �esisto� �an be �onne�ted to ea�� pin by t�e PBPU �egiste�. T�e OSC1 and OSC� pins a�e �onne�ted to an exte�nal ��ystal o� used as I/O pins, determined by configuration options, for the internal system �lo�k. T�e inte�nal system �an also �ome f�om t�e inte�nal �ig� speed RC oscillator, HIRC, which is selected by configuration options. When the HIRC is sele�ted as t�e system os�illato�� t�e OSC1 and OSC� pins �an be used as no�mal I/O pins. T�e abb�eviation EC stands fo� Exte�nal Clo�k mode. In t�e EC mode� an exte�nal �lo�k sou��e is p�ovided on OSC1 as t�e system �lo�k. T�e AN�/T�R0 and AN3~AN7 pins a�e pin-s�a�ed wit� PB�~PB7 �espe�tively and �ont�olled by softwa�e �ont�ol �egiste�s PC0/SEG0~PC7/ SEG7 I/O — Bidi�e�tional 8-bit input/output po�t. Softwa�e inst�u�tions dete�mine if t�e pin is a C�OS output o� S��mitt t�igge� input. A pull-�ig� �esisto� �an be �onne�ted to ea�� pin dete�mined by t�e PCPU �egiste�. T�e SEG0~SEG7 pins a�e LCD d�ive� outputs fo� LCD panel segments and a�e pin-s�a�ed wit� PC0~PC7 pins �espe�tively. |
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