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DAC7528 Folha de dados(PDF) 5 Page - Burr-Brown (TI)

[Old version datasheet] Texas Instruments acquired Burr-Brown Corporation.
Nome de Peças DAC7528
Descrição Electrónicos  CMOS Dual 8-Bit Buffered Multiplying DIGITAL-TO-ANALOG CONVERTER
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Fabricante Electrônico  BURR-BROWN [Burr-Brown (TI)]
Página de início  http://www.burr-brown.com
Logo BURR-BROWN - Burr-Brown (TI)

DAC7528 Folha de dados(HTML) 5 Page - Burr-Brown (TI)

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®
DAC7528
5
DISCUSSION OF
SPECIFICATIONS
RELATIVE ACCURACY
This term, also known as end point linearity or integral
linearity, describes the transfer function of analog output to
digital input code. Relative accuracy describes the deviation
from a straight line, after zero and full scale errors have been
adjusted to zero.
DIFFERENTIAL NONLINEARITY
Differential nonlinearity is the deviation from an ideal 1LSB
change in the output when the input code changes by 1LSB.
A differential nonlinearity specification of 1LSB maximum
guarantees monotonicity.
GAIN ERROR
Gain error is the difference between the full-scale DAC
output and the ideal value. The ideal full scale output value
for the DAC7528 is –(255/256)VREF. Gain error may be
adjusted to zero using external trims as shown in Figure 4.
OUTPUT LEAKAGE CURRENT
The current which appears at I
OUT A and IOUT B with the
DAC loaded with all zeros.
OUTPUT CAPACITANCE
The parasitic capacitance measured from IOUT A or IOUT B to
AGND.
CHANNEL-TO-CHANNEL ISOLATION
The AC output error due to capacitive coupling from DAC
A to DAC B or DAC B to DAC A.
AC FEEDTHROUGH ERROR
The AC output error due to capacitive coupling from V
REF
to IOUT with the DAC loaded with all zeros.
OUTPUT CURRENT SETTLING TIME
The time required for the output current to settle to within
±0.195% of final value for a full scale step.
DIGITAL-TO-ANALOG IMPULSE
The integrated area of the glitch pulse measured in nanovolt-
seconds. The key contributor to digital-to-analog glitch is
charge injected by digital logic switching transients.
DIGITAL CROSSTALK
Glitch impulse measured at the output of one DAC but
caused by a full scale transition on the other DAC. The
integrated area of the glitch pulse is measured in nanovolt-
seconds.
CIRCUIT DESCRIPTION
Figure 1 shows a simplified schematic of one half of a
DAC7528. The current from the V
REF A pin is switched
between IOUT A and AGND by 8 single-pole double-throw
CMOS switches. This maintains a constant current in each
leg of the ladder regardless of the input code. The input
resistance at V
REF A is therefore constant and can be driven
by either a voltage or current, AC or DC, positive or
negative polarity, and have a voltage range up to
±20V.
A CMOS switch transistor, included in series with the ladder
terminating resistor and in series with the feedback resistor,
RFB A, compensates for the temperature drift of the ON
resistance of the ladder switches.
Figure 2 shows an equivalent circuit for DAC A. C
OUT is the
output capacitance due to the N-channel switches and varies
from about 30pF to 70pF with digital input code. The current
source ILKG is the combination of surface and junction
leakages to the substrate. I
LKG approximately doubles every
10
°C. R
O is the equivalent output resistance of the D/A and
it varies with input code.
OUT A
I
AGND
FB A
R
2R
2R
2R
2R
2R
RR
R
V
REF A
DB7
(MSB)
DB6
DB5
DB0
(LSB)
R
FIGURE 1. Equivalent Circuit for DAC A.
FIGURE 2. Simplified Circuit Diagram for DAC A.
FB A
R
OUT A
I
V
REF A
I
LKG
R
OUT
C
O
R
AGND
D
IN
256
x
V
REF
R
R
INSTALLATION
ESD PROTECTION
All digital inputs of the DAC7528 incorporate on-chip ESD
protection circuitry. This protection is designed to withstand
2.5kV (using the Human Body Model, 100pF and 1500
Ω).
However, industry standard ESD protection methods should
be used when handling or storing these components. When
not in use, devices should be stored in conductive foam or
rails. The foam or rails should be discharged to the destina-
tion socket potential before devices are removed.


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